Radio frequency identification transponder memory

• US 20090167496A1
• Filed: 12/31/2007
• Published: 07/02/2009
• Est. Priority Date: 12/31/2007
• Status: Abandoned Application

• Current Assignee: Unity Semiconductor Corporation (Rambus Inc.)
• Original Assignee: Unity Semiconductor Corporation (Rambus Inc.)
• Inventors: Norman, Robert
• Application Number:
  US12/006,187
• Publication Number:
  US 20090167496A1
• Time in Patent Office: Days
• US Class Current: 340/10.100
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G11C 5/02 Disposition of storage elements, e.g. in the form of a matrix array

Abstract

A radio frequency identification (RFID) transponder includes a vertically configured non-volatile memory array. The RFID transponder additionally includes a logic circuitry connected with the vertically configured non-volatile memory array. The logic circuitry is configured to read data from the vertically configured non-volatile memory array. Additionally included is an antenna, which is connected with the logic circuitry. The antenna is configured to collect power from a radio frequency signal and to transmit the data. The non-volatile memory array may include a plurality of two-terminal memory cells that store data as a plurality of conductivity profiles that can be non-destructively sensed by applying a read voltage across the terminals of the cell. The logic circuitry can be positioned in a logic plane and at least one non-volatile memory array may be positioned on top of the logic plane and the non-volatile memory arrays may be vertically stacked upon one another.

Claims

1. A radio frequency identification transponder, comprising:

a vertically configured non-volatile memory array;

a logic circuitry connected with the vertically configured non-volatile memory array, the logic circuitry being configured to read a first data from the vertically configured non-volatile memory array; and

an antenna connected with the logic circuitry, the antenna being configured to generate power from a radio frequency signal and to transmit the first data.

2. The radio frequency identification transponder of claim 1, wherein the vertically configured non-volatile memory array is disposed above the logic circuitry.

3. The radio frequency identification transponder of claim 1, wherein the logic circuitry includes a memory controller.

4. The radio frequency identification transponder of claim 1, wherein the logic circuitry includes a modulator configured to encode the first data read from the vertically configured non-volatile memory array.

5. The radio frequency identification transponder of claim 1, wherein the logic circuitry includes a charge pump configured to increase a voltage associated with the power from the radio frequency signal.

6. The radio frequency identification transponder of claim 1, wherein the vertically configured non-volatile memory array comprises two-terminal memory cells.

7. The radio frequency identification transponder of claim 1, wherein a second data is encoded in the radio frequency signal, wherein the antenna is configured to receive the radio frequency signal, and wherein the logic circuitry is configured to write the second data to the vertically configured non-volatile memory array.

8. A radio frequency identification transponder, comprising:

a vertically configured non-volatile memory array;

a memory controller connected with the vertically configured non-volatile memory array, the memory controller being configured to read data from the vertically configured non-volatile memory array;

a power supply connected with the memory controller; and

an antenna connected with the memory controller, the antenna being configured to transmit the data.

9. The radio frequency identification transponder of claim 8, wherein the vertically configured non-volatile memory array is disposed above the memory controller.

10. The radio frequency identification transponder of claim 8 and further comprising:

a modulator connected with the memory controller, the modulator being configured to encode the data read from the vertically configured non-volatile memory array.

11. The radio frequency identification transponder of claim 8, wherein the memory controller is configured to access the vertically configured non-volatile memory array randomly.

12. The radio frequency identification transponder of claim 8, wherein the vertically configured non-volatile memory array comprises two-terminal memory cells.

13. A radio frequency identification communication system, comprising:

a radio frequency identification transponder comprising a vertically configured non-volatile memory array; and

a radio frequency identification interrogator configured to transmit a radio frequency signal to the radio frequency identification transponder.

14. The system of claim 13, wherein the radio frequency identification transponder is configured to read data from the vertically configured non-volatile memory array and to transmit the data to the radio frequency identification interrogator.

15. The system of claim 13, wherein the radio frequency identification interrogator is configured to transmit data encoded in the radio frequency signal to the radio frequency identification transponder and the radio frequency identification transponder is configured to write the data to the vertically configured non-volatile memory array.

16. The system of claim 13, wherein the radio frequency identification transponder further comprises,

a logic circuitry connected with the vertically configured non-volatile memory array, the logic circuitry being configured to read data from the vertically configured non-volatile memory array, and

an antenna connected with the logic circuitry, the antenna being configured to generate power from the radio frequency signal and to transmit the data.

17. The system of claim 16, wherein the vertically configured non-volatile memory array is disposed above the logic circuitry.

18. The system of claim 16, wherein the vertically configured non-volatile memory array is configured as a cross-point array.

19. The system of Claim. 16, wherein the vertically configured non-volatile memory array comprises a plurality of two-terminal memory cells.

20. The system of claim 19, wherein each two-terminal memory cell stores data as a plurality of conductivity profiles that can be non-destructively sensed by applying a read voltage across the terminals of two-terminal memory cell, the two-terminal memory cell retains stored data in the absence of power, and new data can be written to the two-terminal memory cell by applying a write voltage across the terminals of two-terminal memory cell.