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THREE-DIMENSIONAL MEMORY DEVICE WITH MULTI-PLANE ARCHITECTURE

  • US 20090168534A1
  • Filed: 12/24/2008
  • Published: 07/02/2009
  • Est. Priority Date: 01/02/2008
  • Status: Active Grant
First Claim
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1. A 3D memory device comprising:

  • a first plane including a first mat formed on a first layer and a third mat formed on a second layer disposed over the first layer, the first and third mats sharing a bit line; and

    a second plane including a second mat formed on the first layer and a fourth mat formed on the second layer, the second and fourth mats sharing a bit line, wherein each one of the first through fourth mats comprises a plurality of blocks, wherein a block associated with the first plane is simultaneously accessed with a block of the second plane.

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