Enabling permute operations with flexible zero control
First Claim
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1. A processor comprising:
- a logic to receive a permute instruction, first and second source operands, a first control value, and a second control value, and to perform a permute operation, wherein the logic is to store a selected portion of the first or second source operand or a zero value in a destination location based on an operation between a first portion of the first control value and at least a portion of the second control value.
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Abstract
In one embodiment, the present invention includes logic to receive a permute instruction, first and second source operands, and control values, and to perform a permute operation based on an operation between at least two of the control values. Multiple permute instructions may be combined to perform efficient table lookups. Other embodiments are described and claimed.
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Citations
24 Claims
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1. A processor comprising:
a logic to receive a permute instruction, first and second source operands, a first control value, and a second control value, and to perform a permute operation, wherein the logic is to store a selected portion of the first or second source operand or a zero value in a destination location based on an operation between a first portion of the first control value and at least a portion of the second control value. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A machine-readable medium having stored thereon instructions, which when executed by a machine causes the machine to perform a method comprising:
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performing a first pair of permute operations each responsive to a user-level permute instruction to obtain a first and second permuted result; logically combining the first and second permuted results to obtain a first combined result; performing at least one other permute operation responsive to a user-level permute instruction to obtain a third permuted result; logically combining the first combined result and the third permuted result to obtain a final result. - View Dependent Claims (11, 12, 13)
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14. A method comprising:
performing a data sieve using a plurality of user-level permute instructions that execute using registers of a register file of a processor, to obtain a lookup result from a table stored in a storage coupled to the processor. - View Dependent Claims (15, 16, 17)
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18. A system comprising:
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a processor including a first logic to generate a permuted result including a selected portion of a first or second source operand or a zero value for each element of a destination location responsive to a first permute instruction of a family of permute instructions, based on a comparison between a first control value and a second control value associated with the first permute instruction, and a second logic to combine the permuted result and a second permuted result of a second permute instruction of the family of permute instructions and to store the combined result in a second destination location; and a dynamic random access memory (DRAM) coupled to the processor. - View Dependent Claims (19, 20, 21, 22, 23, 24)
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Specification