STRAINED-CHANNEL FET COMPRISING TWIST-BONDED SEMICONDUCTOR LAYER
First Claim
1. A field effect transistor (FET) comprising a strained semiconductor channel located in a twist-bonded semiconductor layer and situated between spaced-apart source/drain (S/D) regions and under a gate stack, wherein a twist-bonded interface separates the twist-bonded semiconductor layer from an underlying substrate semiconductor layer, and at least some channel strain is induced by one or more local stress elements.
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Abstract
This invention provides a strained-channel field effect transistor (FET) in which the semiconductor of the channel of the FET is formed in a compliant substrate layer disposed over a twist-bonded semiconductor interface. This FET geometry increases the efficacy of local stress elements such as stress liners and embedded lattice-mismatched source/drain regions by mechanically decoupling the semiconductor of the channel region from the underlying rigid substrate. These strained-channel FETs may be incorporated into complementary metal oxide semiconductor (CMOS) circuits in various combinations. In one embodiment of this invention, both pFETs and nFETs are in a twist-bonded (001) silicon layer on a (001) silicon base layer. In another embodiment, pFETs are in a twist-bonded (011) silicon layer on a (001) silicon base layer and nFETs are in a conventional, non-twist-bonded (001) silicon base layer. This invention also provides a twist-bonded semiconductor layer on a polycrystalline base layer, as well as methods for fabricating the aforementioned FETs.
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Citations
20 Claims
- 1. A field effect transistor (FET) comprising a strained semiconductor channel located in a twist-bonded semiconductor layer and situated between spaced-apart source/drain (S/D) regions and under a gate stack, wherein a twist-bonded interface separates the twist-bonded semiconductor layer from an underlying substrate semiconductor layer, and at least some channel strain is induced by one or more local stress elements.
- 7. A semiconductor structure comprising a plurality of field effect transistors (FETs) each including at least a gate stack and S/D regions located on a substrate, wherein at least one of the FETs has a strained semiconductor channel disposed in a twist-bonded semiconductor layer located atop said substrate and at least some channel strain is induced by one or more local stress elements.
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11. A method for forming at least one field effect transistor (FET) on a twist-bonded semiconductor layer comprising:
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forming a twist-bonded semiconductor layer on a base semiconductor layer; and forming at least one FET on said twist-bonded semiconductor layer, wherein said forming said at least one FET includes forming at least one local stress element adjacent said at least one FET. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A method for forming a plurality of FETs including at least one nFET and at least one pFET, the nFET on a non-twist-bonded (001) Si layer and the pFET on a twist-bonded (011) Si layer comprising:
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forming a twist-bonded (011) Si layer on a (001) Si base substrate layer, said twist-bonded and base Si substrate layers separated by a twist-bonded interface; amorphizing selected areas of the (011) Si layer to a depth below the twist-bonded interface and recrystallizing said amorphized areas to the orientation of the Si base substrate layer to produce changed-orientation (001) Si regions and original-orientation, twist-bonded (011) Si regions; and forming at least one nFET on the changed-orientation (001) regions and at least one pFET on the original-orientation, twist-bonded (011) regions, said forming the at least one nFET and the at least one pFET including formation of at least one local stress element. - View Dependent Claims (19)
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20. A method of forming a twist-bonded semiconductor layer on a semiconductor-on-insulator layer comprising:
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selecting a starting substrate; forming an insulating layer on said substrate; forming a polycrystalline semiconductor layer on said insulating layer; and bonding a single crystal semiconductor layer directly to said polycrystalline layer to form a twist-bonded layer on a twist-bonded interface.
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Specification