CONSTRUCTION METHODS FOR BACKSIDE ILLUMINATED IMAGE SENSORS

• US 20090174018A1
• Filed: 01/09/2008
• Published: 07/09/2009
• Est. Priority Date: 01/09/2008
• Status: Abandoned Application

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Dungan, Thomas Edward, Farnworth, Warren
• Application Number:
  US11/971,461
• Publication Number:
  US 20090174018A1
• Time in Patent Office: Days
• US Class Current: 257/432
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05 of an individual bonding area
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/13009 Bump connector integrally formed with a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: H01L 2924/014 Solder alloys

Abstract

A method of constructing a backside illuminated image sensor is described. The method includes the steps of forming a semiconductor wafer, forming at least electrical contacts in the semiconductor wafer, forming, in a handle wafer separate from the semiconductor wafer, a plurality of via holes, attaching the semiconductor wafer to the handle wafer such that the via holes in the handle wafer are aligned with the respective electrical contacts on the semiconductor wafer, removing the substrate layer from the semiconductor wafer, removing at least a portion of the handle wafer to expose the plurality of via holes, filling each of the exposed via holes with a conductive material and applying a solder material to each of the exposed via holes such that the conductive material in each of the via holes is electrically connected to the solder material.

Claims

1. Method of manufacturing a thin semiconductor device, the method comprising the steps of:

forming a semiconductor wafer having a substrate layer and an electronics layer, wherein the substrate layer is thicker than the electronics layer, the substrate layer extends to a bottom surface of the semiconductor wafer and the electronics layer includes a plurality of electrical contacts that extend to a top surface of the semiconductor wafer;

forming, in a handle wafer separate from the semiconductor wafer, a plurality of via holes, each of the via holes extending from a top surface of the handle wafer partially through the handle wafer toward a bottom surface of the handle wafer and corresponding in position on the handle wafer to a respective one of the plurality of electrical contacts on the semiconductor wafer;

attaching the top surface of the semiconductor wafer to the top surface of the handle wafer such that the via holes in the handle wafer are aligned with the respective electrical contacts on the semiconductor wafer;

removing the substrate layer from the semiconductor wafer;

removing at least a portion of the handle wafer from the bottom surface of the handle wafer to expose the plurality of via holes; and

filling each of the exposed via holes with a conductive material to form a conductive channel from the respective electrical contact in the at least one via hole.

2. The method of manufacturing a thin semiconductor device of claim 1, further comprising the step of attaching an array of color filters to a bottom surface of the semiconductor wafer after the substrate is removed from the semiconductor wafer.

3. The method of manufacturing a thin semiconductor device of claim 1, wherein the attaching step includes attaching the handle wafer to the semiconductor wafer using an adhesive selected from a group consisting of benzocylobutene, a curable polymer or a curable polyimide.

4. The method of manufacturing a thin semiconductor device of claim 3, wherein the step of forming the plurality of via holes in the handle wafer includes using dry plasma etch processing.

5. The method of manufacturing a thin semiconductor device of claim 3, further comprising the steps of:

covering the array of color filters with a temporary protection layer,

flipping the semiconductor wafer so that the array of color filters is placed on a work surface, wherein the conductive material is applied to each of the exposed via holes after the semiconductor wafer is flipped, and

removing the temporary protection layer after the conductive material is applied to each of the exposed via holes.

6. The method of manufacturing a thin semiconductor device of claim 1, further comprising the step of forming an insulating layer on the top surface of the semiconductor wafer by thermally oxidizing the top surface of the semiconductor wafer before attaching the top surface of the handle wafer to the bottom surface of the semiconductor wafer,

wherein the insulating layer is formed before the color filters are attached to the bottom surface of the semiconductor wafer remaining after the substrate layer is removed from the semiconductor wafer.

7. The method of manufacturing a thin semiconductor device of claim 6, further comprising the step of forming an insulating material on interior surfaces of the via holes by thermally oxidizing the interior surfaces of the via holes before the via holes are filled with the conductive material.

8. A method of manufacturing a thin semiconductor device, the method comprising the steps of:

forming a semiconductor wafer having a substrate layer and an electronics layer, wherein;

the substrate layer is thicker than the electronics layer, the substrate layer extends to a bottom surface of the semiconductor wafer and the electronics layer extends to a top surface of the semiconductor wafer;

forming a handle wafer separate from the semiconductor wafer;

attaching the top surface of the semiconductor wafer to a top surface of the handle wafer;

removing the substrate layer from the semiconductor wafer;

forming a glass cover layer over the bottom surface of the semiconductor wafer;

flipping the semiconductor wafer so that a bottom surface of the handle wafer is exposed for processing; and

using the glass cover layer to provide mechanical support for the semiconductor wafer, removing the handle wafer from the semiconductor wafer.

9. The method of manufacturing a thin semiconductor device of claim 8, further comprising the steps of:

removing an adhesive bond used to attach the top surface of the semiconductor wafer to the top surface of the handle wafer to expose a plurality of contacts of the semiconductor wafer; and

using an electrolytic plating process, forming conductive traces, each conductive trace being electrically coupled to a respective one of the plurality of contacts.

10. The method of manufacturing a thin semiconductor device of claim 8, further comprising the steps of:

removing an adhesive bond used to attach the top surface of the semiconductor wafer to the top surface of the handle wafer to expose a plurality of contacts from the semiconductor wafer;

forming a thick polymer coating on the top surface of the semiconductor wafer; and

forming and filling with a conductive material, a plurality of via holes in the thick polymer coating.

11. The method of manufacturing a thin semiconductor device of claim 8, further comprising the step of:

forming a smart cut fault line in the handle wafer separating a majority portion of the handle wafer from a minority portion of the handle wafer before attaching the minority portion of the handle wafer to the semiconductor wafer,

wherein the step of removing the handle wafer from the semiconductor wafer includes separating the majority portion from the minority portion at the fault line and removing the minority portion from the semiconductor wafer.

12. The method of manufacturing a thin semiconductor device of claim 11,

wherein the smart cut fault line is formed in the handle wafer by:

bombarding the handle wafer with ions to implant the ions in the handle wafer while maintaining the handle wafer at a first temperature; and

heat treating the handle wafer at a second temperature greater than the first temperature, to define a separation between the a majority portion of the handle wafer and a minority portion of the handle wafer.

13. The method of manufacturing a thin semiconductor device of claim 12, wherein the first temperature is lower than a temperature at which the implanted ions may escape from the handle wafer by diffusion.

14. The method of manufacturing a thin semiconductor device of claim 11,

wherein the smart cut fault line is formed in the handle wafer by focusing an infrared laser at a point beneath the top surface of the handle wafer and scanning the focused laser across the top surface of the handle wafer.

15. The method of manufacturing a thin semiconductor device of claim 8, wherein the step of attaching the top surface of the semiconductor wafer to the top surface of the handle wafer includes applying a temporary adhesive to at least one of the top surfaces of the semiconductor wafer and the top surface of the handle wafer and the step of removing the adhesive bond includes sliding the semiconductor wafer relative to the handle wafer to break the bond and dissolving any of the temporary adhesive on the semiconductor wafer.

16. The method of manufacturing a thin semiconductor device of claim 8, further comprising the steps of:

forming a color filter array on a surface of the semiconductor wafer remaining after the substrate is removed;

forming a microlens array over the color filter array,

wherein a cavity is formed between a top surface of the color filter array and a bottom surface of the cover glass when the cover glass is formed over the color filter array.

17. The method of manufacturing a thin semiconductor device of claim 16, further comprising the step of:

filling the cavity with an optical gap fill material having an index of refraction less than an index of refraction of the cover glass and less than an index of refraction of the microlenses.

18. The method of manufacturing a thin semiconductor device of claim 16, further comprising the step of:

forming a passivation layer on the color filter array,

wherein the cover glass is formed over the color filter array by attaching the cover glass to the passivation layer.

19. The method of manufacturing a thin semiconductor device of claim 16,

wherein the step of attaching the semiconductor wafer to the handle wafer includes the steps of applying an adhesive to at least one of the semiconductor wafer and the handle wafer and pressing the semiconductor wafer and handle wafer together,

wherein the cover glass is permanently attached to passivation layer using an adhesive having different material properties than the adhesive used to attach the top surface of the semiconductor wafer to the top surface of the handle wafer.

20. A back illuminated imager comprising:

a semiconductor wafer including a plurality of image sensing elements configured to receive light through a back side of the wafer;

a plurality of lenses disposed above the back side of the wafer such that an air gap is formed between the plurality of lenses and the back side of the wafer;

a cover glass attached to the back side of the wafer such that the cover glass is disposed above the plurality of lenses and the air gap; and

a plurality of electrical contacts formed on a front side of the wafer.

21. The back illuminated imager of claim 20, further comprising a thick polymer coating disposed directly on the front side of the wafer.

22. The back illuminated imager of claim 21, further comprising a plurality of color filters disposed directly on the back side of the wafer.

23. The back illuminated imager of claim 20, wherein the semiconductor wafer has a thickness of between 1.5 and 15 microns.

24. A back illuminated imager comprising:

a semiconductor wafer including a plurality of image sensing elements configured to receive light through a back side of the wafer;

a plurality of electrical contacts formed on the front side of the wafer;

a handle wafer permanently bonded to the semiconductor wafer, the handle wafer having formed through it a plurality of vias, each via corresponding to a respective one of the plurality of electrical contacts and filled with a conductive material.

25. The back illuminated imager of claim 24, wherein the semiconductor wafer has a thickness of between 1.5 and 15 microns.