PRODUCTION OF SINGLE-CRYSTAL SEMICONDUCTOR MATERIAL USING A NANOSTRUCTURE TEMPLATE

• US 20090174038A1
• Filed: 01/17/2008
• Published: 07/09/2009
• Est. Priority Date: 01/19/2007
• Status: Active Grant

• Current Assignee: Quantum NIL Limited, Quantum NIL Limited Taiwan Branch
• Original Assignee: Nanogan Limited (IQE, PLC)
• Inventors: Wang, Wang Nang
• Granted Patent: US 8,828,849 B2
• Time in Patent Office: Days
• US Class Current: 257/618
• CPC Class Codes: C30B 25/00 Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
• CPC Class Codes: C30B 25/02 Epitaxial-layer growth
• CPC Class Codes: C30B 25/04 Pattern deposit, e.g. by using masks
• CPC Class Codes: C30B 25/18 characterised by the substrate
• CPC Class Codes: C30B 29/16 Oxides
• CPC Class Codes: C30B 29/36 Carbides
• CPC Class Codes: C30B 29/40 AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: C30B 29/48 AIIBVI compounds wherein A is Zn, Cd or Hg, and B is S, Se or Te
• CPC Class Codes: C30B 29/60 characterised by shape
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate

Abstract

A method of producing single-crystal semiconductor material comprises: providing a template material; creating a mask on top of the template material; using the mask to form a plurality of nanostructures in the template material; and growing the single-crystal semiconductor material onto the nanostructures.

Claims

1-47. -47. (canceled)

48. A method of creating semiconductor nanostructures, comprising the steps of:

(a) providing a template material comprising a layer of semiconductor material;

(b) creating a mask on top of the template material; and

(c) using the mask to form at least one nanostructure in the template material.

49. A method producing single-crystal semiconductor material comprising using the method of claim 48 to form a plurality of nanostructures in the template material;

and

growing the single-crystal semiconductor material onto the nanostructures.

50. A method according to claim 48, wherein the template material comprises a substrate.

51. A method according to claim 48, wherein the template material semiconductor layer is selected from the group consisting of p-type doped, n-type doped or undoped III-V and II-VI compounds, and metal oxides.

52. A method according to claim 51, wherein the template material semiconductor layer comprises a simple layer, or multiple layers, or the heterostructure, or superlattices of the III-V or II-VI compounds.

53. A method according to claim 51, wherein the template material semiconductor layer comprises one of AlN, AlxGa1−

xN with 1>

x>

0, GaN, or InxGa1−

xN with 1>

x>

0.

54. A method according to claim 48, wherein the template material comprises a top layer of p-GaN.

55. A method according to claim 50, wherein the semiconductor layer is formed by deposition onto the substrate by epitaxial growth methods.

56. A method according to claim 50, wherein the substrate comprises a material selected from the group consisting of sapphire, silicon, silicon carbide, diamond, metals, metal oxides, compound semiconductors, glass, quartz and composite materials.

57. A method according to claim 50, wherein the substrate comprises a single crystal material with a specific crystal orientation.

58. A method according to claim 48, wherein step (b) includes depositing a layer of dielectric material onto the template material.

59. A method according to claim 58, wherein the mask is formed by imprinting onto the dielectric material using a nano-imprint method.

60. A method according to claim 58, wherein a layer of metal is applied onto the layer of dielectric material and the mask is formed by removing regions of the metal layer.

61. A method according to claim 48, wherein in step (b), the mask is created using one of metal annealing, anodic porous alumina, e-Beam lithography, interferometry, holography, photolithography or a nano-imprint method.

62. A method according to claim 48, wherein in step (c), the nanostructures are formed by etching the template material.

63. A method according to claim 62, wherein the etching is used to remove part of the substrate.

64. A method according to claim 62, wherein after etching, any remaining metal and/or dielectric material on the nanostructures is removed.

65. A method according to claim 48, comprising the step of subjecting the nanostructures to a nitridation process.

66. A method according to claim 48, wherein each nanostructure comprises a nanocolumn.

67. A method according to claim 49, wherein step (d) comprises laterally growing an initial layer of semiconductor material, then vertically growing the semiconductor material onto the initial layer.

68. A method according to claim 67, wherein the lateral growth of semiconductor material is carried out by a MOCVD, a MBBE, an HVPE method or a pulsed growth method.

69. A method according to claim 67, wherein the vertical growth of semiconductor material is carried out by an HVPE method.

70. A method according to claim 49, wherein the single-crystal semiconductor material is either polar or non-polar.

71. A method according to claim 57, wherein the substrate crystal orientation is selected to determine whether the single-crystal semiconductor material is polar or non-polar.

72. A method according to claim 49, further comprising the step of:

(e) separating the single-crystal semiconductor material from the nanostructures.

73. A method according to claim 72, wherein the single-crystal semiconductor material is separated from the nanostructures by a method selected from the group of rapidly cooling the material, wet etching, electrochemical etching, laser ablation, or by mechanical separation.

74. A single-crystal semiconductor material grown using the method according to claim 49.

75. A semiconductor nanostructure formed by a method in accordance with claim 48.