TEST APPARATUS, PROBE CARD, AND TEST METHOD

• US 20090174420A1
• Filed: 01/08/2008
• Published: 07/09/2009
• Est. Priority Date: 01/08/2008
• Status: Active Grant

• Current Assignee: Advantest Corporation
• Original Assignee: Advantest Corporation
• Inventors: ARIYAMA, YUJI, KOMAGATA, SHIGEMI
• Granted Patent: US 7,755,375 B2
• Time in Patent Office: Days
• US Class Current: 324/754.80
• CPC Class Codes: G01R 31/31928 Formatter driver, receiver details G01R31/31924

Abstract

There is provided a test apparatus for testing a device under test. The test apparatus includes a plurality of drivers that respectively output a plurality of test signals to a same terminal of the device under test so as to supply, to the same terminal of the device under test, a multiple-valued signal that is generated by combining together the plurality of test signals, and a plurality of probe pins that are provided in a one-to-one correspondence with the plurality of drivers. Here, each of the plurality of probe pins has a top end portion to be electrically connected to the same terminal of the device under test so as to supply a signal output from a corresponding one of the plurality of drivers to the same terminal of the device under test while the test apparatus is testing the device under test, and the top end portion of each probe pin is kept electrically open while the test apparatus is not testing the device under test.

Claims

1. A test apparatus for testing a device under test, comprising:

a plurality of drivers that respectively output a plurality of test signals to a same terminal of the device under test so as to supply, to the same terminal of the device under test, a multiple-valued signal that is generated by combining together the plurality of test signals; and

a plurality of probe pins that are provided in a one-to-one correspondence with the plurality of drivers, each of the plurality of probe pins having a top end portion to be electrically connected to the same terminal of the device under test so as to supply a signal output from a corresponding one of the plurality of drivers to the same terminal of the device under test while the test apparatus is testing the device under test, the top end portion of each probe pin being kept electrically open while the test apparatus is not testing the device under test.

2. The test apparatus as set forth in claim 1, further comprising

a plurality of transmission paths that are provided in a one-to-one correspondence with the plurality of drivers, each of the plurality of transmission paths transmitting therethrough a signal output from a corresponding one of the plurality of drivers to a corresponding one of the plurality of probe pins, wherein

each of the plurality of probe pins has a connection portion connected to a corresponding one of the plurality of transmission paths, and

the plurality of probe pines are formed in such a manner that the top end portions are arranged at a smaller interval than the connection portions.

3. The test apparatus as set forth in claim 2, wherein

the top end portions to be connected to the same terminal of the device under test are arranged at an interval that is smaller than a width of the same terminal.

4. The test apparatus as set forth in claim 2, further comprising

a probe card that has the plurality of transmission paths and the plurality of probe pins fixed therein, wherein

the plurality of transmission paths are formed on the probe card, and

the plurality of probe pins are formed in such a manner that the connection portions are fixed on the probe card and the top end portions protrude from a surface of the probe card.

5. The test apparatus as set forth in claim 2, further comprising:

a plurality of comparators that are provided in a one-to-one correspondence with the plurality of drivers, each of the plurality of comparators having an input end electrically connected to an output end of a corresponding one of the plurality of drivers, each comparator measuring a signal input thereto; and

a synchronization adjusting section that causes the plurality of drivers to respectively output a plurality of adjustment signals, causes the plurality of comparators to measure reflected waves of the plurality of adjustment signals, and adjusts timings at which the plurality of drivers output the plurality of test signals with reference to a result of the measurement of the reflected waves.

6. The test apparatus as set forth in claim 5, wherein

the synchronization adjusting section adjusts the timing at which each of the plurality of drivers outputs the test signal with reference to (i) a timing at which a corresponding one of the plurality of comparators detects the adjustment signal output from the each driver and (ii) a timing at which the corresponding comparator detects the adjustment signal which is reflected at the top end portion of a corresponding one of the plurality of probe pins.

7. A test apparatus for testing a device under test, comprising:

a plurality of drivers that respectively output a plurality of test signals;

a pin electronics section that has the plurality of drivers formed therein;

a wiring portion that electrically connects together output ends of the plurality of drivers on a substrate of the pin electronics section, so as to generate a multiple-valued signal by combining together the plurality of test signals; and

a probe pin that receives the multiple-valued signal transmitted via the wiring portion outside the pin electronics section, and supplies the received multiple-valued signal to the device under test.

8. The test apparatus as set forth in claim 7, wherein

the wiring portion has therein a common transmission path that is connected at one end thereof to the probe pin and at the other end thereof to the output ends of the plurality of drivers, and

the common transmission path is formed such that a signal delay time from the output end of each of the plurality of drivers to the common transmission path is substantially the same.

9. A probe card for use with a test apparatus that has therein a plurality of drivers respectively outputting a plurality of test signals, the probe card comprising

a plurality of probe pins that are provided in a one-to-one correspondence with the plurality of drivers, each of the plurality of probe pins having a top end portion to be electrically connected to a same terminal of a device under test so as to supply a signal output from a corresponding one of the plurality of drivers to the same terminal of the device under test while the test apparatus is testing the device under test, the top end portion of each probe pin being kept electrically open while the test apparatus is not testing the device under test.

10. A test method for testing a device under test by using a test apparatus including therein a plurality of drivers respectively outputting a plurality of test signals and a plurality of probe pins respectively supplying the plurality of test signals output from the plurality of drivers to the device under test, wherein

the test method:

causes the plurality of drivers to respectively output a plurality of adjustment signals while top end portions of the plurality of probe pins are kept open;

measures the adjustment signals which are reflected at the top end portions of the plurality of probe pins; and

adjusts timings at which the plurality of drivers respectively output the plurality of test signals with reference to a result of the measurement, and

the test method supplies, to the device under test, a multiple-valued signal generated by combining together the plurality of test signals output from the plurality of drivers by causing the plurality of drivers to output the plurality of test signals while the top end portions of the plurality of probe pins are kept electrically connected to a same terminal of the device under test.