TWO-WAY ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

• US 20090174975A1
• Filed: 08/11/2008
• Published: 07/09/2009
• Est. Priority Date: 01/09/2008
• Status: Active Grant

• Current Assignee: Chunghwa Picture Tubes Limited
• Original Assignee: Chunghwa Picture Tubes Limited
• Inventors: Li, Wei-Long, Huang, Chin-Hai
• Granted Patent: US 8,179,644 B2
• Time in Patent Office: Days
• US Class Current: 361/56
• CPC Class Codes: G09G 2330/04 Display protection
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: H01L 27/0248 for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection

Abstract

An electrostatic discharge (ESD) protection circuit electrically connected to a first conductive line and a second conductive line is provided. The ESD protection circuit has a first ESD protection circuit unit, wherein the first ESD circuit unit includes a first coupled capacitor and a first active device. The first coupled capacitor includes a first electrode and a second electrode, wherein the first electrode is electrically connected to the first conductive line. The first active device includes a first gate, a first source and a first drain, wherein the first gate is electrically connected to the second electrode. In addition, the first source and the first electrode are electrically connected to the first conductive line, and the first drain is electrically connected to the second conductive line. Therefore, the conduction efficiency of the ESD protection circuit is improved.

Claims

1. An ESD protection circuit electrically connected to a first conductive line and a second conductive line and comprising a first ESD protection circuit unit, wherein the first ESD protection circuit unit comprises:

a first active device comprising a first source, a first drain, and a first gate, wherein the first source and the first gate are electrically connected to the first conductive line;

a second active device comprising a second source, a second drain, and a second gate, wherein the second gate is electrically connected to the first conductive line, the second source is electrically connected to the first drain, and the second drain is electrically connected to the second conductive line; and

a third active device comprising a third source, a third drain, and a third gate, wherein the third drain is electrically connected to the first drain and the second source, and the third source and the third gate are electrically connected to the second conductive line.

2. The ESD protection circuit according to claim 1, further comprising a second ESD protection circuit unit, wherein the second ESD protection circuit unit comprises:

a fourth active device comprising a fourth source, a fourth drain, and a fourth gate, wherein the fourth source and the fourth gate are electrically connected to the second conductive line;

a fifth active device comprising a fifth source, a fifth drain, and a fifth gate, wherein the fifth gate is electrically connected to the second conductive line, the fifth source is electrically connected to the fourth drain, and the fifth drain is electrically connected to the first conductive line; and

a sixth active device comprising a sixth source, a sixth drain, and a sixth gate, wherein the sixth drain is electrically connected to the fourth drain and the fifth source, and the sixth source and the sixth gate are electrically connected to the first conductive line.

3. The ESD protection circuit according to claim 1, wherein the first conductive line comprises a signal line.

4. The ESD protection circuit according to claim 3, wherein the signal line comprises a scan line or a data line.

5. The ESD protection circuit according to claim 1, wherein the second conductive line comprises a shorting bar.

6. An active device array substrate, having a display region and a peripheral circuit region outside the display region, wherein the active device array substrate comprises:

a substrate;

a plurality of pixel units arranged on the substrate and inside the display region;

a plurality of first conductive lines disposed on the substrate and inside the display region, wherein the first conductive lines are electrically connected to the pixel units and extended to the peripheral circuit region;

a plurality of second conductive lines disposed on the substrate and inside the peripheral circuit region;

a plurality of ESD protection circuits disposed on the substrate and inside the peripheral circuit region and electrically connected to the first conductive lines and the second conductive lines, wherein each of the respective ESD protection circuits has a first ESD protection circuit unit comprising;

a first active device comprising a first source, a first drain, and a first gate, wherein the first source and the first gate are electrically connected to the first conductive line;

a second active device comprising a second source, a second drain, and a second gate, wherein the second gate is electrically connected to the first conductive line, the second source is electrically connected to the first drain, and the second drain is electrically connected to the second conductive line; and

a third active device comprising a third source, a third drain, and a third gate, wherein the third drain is electrically connected to the first drain and the second source, and the third source and the third gate are electrically connected to the second conductive line.

7. The active device array substrate according to claim 6, wherein each of the respective ESD protection circuits further has a second ESD protection circuit unit comprising:

a fourth active device comprising a fourth source, a fourth drain, and a fourth gate, wherein the fourth source and the fourth gate are electrically connected to the second conductive line;

a fifth active device comprising a fifth source, a fifth drain, and a fifth gate, wherein the fifth gate is electrically connected to the second conductive line, the fifth source is electrically connected to the fourth drain, and the fifth drain is electrically connected to the first conductive line; and

a sixth active device comprising a sixth source, a sixth drain, and a sixth gate, wherein the sixth drain is electrically connected to the fourth drain and the fifth source, and the sixth source and the sixth gate are electrically connected to the first conductive line.

8. The active device array substrate according to claim 6, wherein the first conductive line comprises a signal line.

9. The active device array substrate according to claim 8, wherein the signal line comprises a scan line or a data line.

10. The active device array substrate according to claim 6, wherein the second conductive line comprises a shorting bar.

11. An ESD protection circuit electrically connected to a first conductive line and a second conductive line and comprising a first ESD protection circuit unit, wherein the first ESD protection circuit unit comprises:

a first coupled capacitor comprising a first electrode and a second electrode, wherein the first electrode is electrically connected to the first conductive line; and

a first active device comprising a first gate, a first source, and a first drain, wherein the first gate and the second electrode are electrically connected, the first source, the first electrode, and the first conductive line are electrically connected, and the first drain and the second conductive line are electrically connected.

12. The ESD protection circuit according to claim 11, wherein each of the respective ESD protection units further comprises a second ESD protection circuit unit, the second ESD protection circuit unit comprising:

a second coupled capacitor comprising a third electrode and a fourth electrode, wherein the third electrode is electrically connected to the second conductive line; and

a second active device comprising a second gate, a second source, and a second drain, wherein the second gate and the fourth electrode are electrically connected, the second source, the third electrode, and the second conductive line are electrically connected, and the second drain and the first conductive line are electrically connected.

13. The ESD protection circuit according to claim 11, wherein the first conductive line comprises a signal line.

14. The ESD protection circuit according to claim 13, wherein the signal line comprises a scan line or a data line.

15. The ESD protection circuit according to claim 11, wherein the second conductive line comprises a shorting bar.

16. An ESD protection circuit electrically connected to a first conductive line and a second conductive line, and comprising a first ESD protection circuit unit, the first ESD protection circuit unit comprising a plurality of circuit modules connected in series, wherein each of the circuit modules comprises:

a first coupled capacitor comprising a first electrode and a second electrode; and

a first active device comprising a first gate, a first source, and a first drain, wherein the first gate and the second electrode are electrically connected, and the first source, the first electrode, and the first drain of the previous stage circuit module are electrically connected,

the first electrode of the first stage of the circuit modules connected in series being electrically connected to the first conductive line, the first drain of the last stage of the circuit modules connected in series being electrically connected to the second conductive line.

17. The ESD protection circuit according to claim 16, further comprising a second ESD protection circuit unit, wherein the second ESD protection circuit unit comprises:

a second coupled capacitor comprising a third electrode and a fourth electrode; and

a second active device comprising a second gate, a second source, and a second drain, wherein the second gate and the fourth electrode are electrically connected, and the second source, the third electrode, and the second drain of the previous stage circuit module are electrically connected,

therein the third electrode of the first stage of the circuit modules connected in series is electrically connected to the second conductive line, and the second drain of the last stage of the circuit modules connected in series is electrically connected to the first conductive line.

18. The ESD protection circuit according to claim 16, wherein the first conductive line comprises a signal line.

19. The ESD protection circuit according to claim 18, wherein the signal line comprises a scan line or a data line.

20. The ESD protection circuit according to claim 16, wherein the second conductive line comprises a shorting bar.