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CURRENT SENSING METHOD AND APPARATUS FOR A MEMORY ARRAY

  • US 20090175094A1
  • Filed: 03/16/2009
  • Published: 07/09/2009
  • Est. Priority Date: 03/21/2001
  • Status: Active Grant
First Claim
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1. In a memory array having memory cells with diode-like conduction characteristics, for at least one of two memory cell data states, each memory cell coupled between a word line and a bit line and having first and second nominal current levels in accordance with its data state when forward biased, a method of sensing the data state of a selected memory cell comprising the steps of:

  • driving a selected word line to a selected word line bias voltage;

    driving a selected bit line to a selected bit line bias voltage;

    precharging a sense node to a precharge sense voltage;

    summing, at the sense node, a selected bit line current and a reference current having a magnitude between the first and second nominal current levels;

    thendeveloping a voltage on the sense node that increases to a higher voltage for one data state, and decreases to a lower voltage for the other data state, while the selected bit line remains substantially at the selected bit line bias voltage; and

    comparing the sense node voltage with a sense reference voltage to determine the selected memory cell data state.

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