MULTIPLE ACCESS OVER PROXIMITY COMMUNICATION

• US 20090176450A1
• Filed: 01/09/2008
• Published: 07/09/2009
• Est. Priority Date: 01/09/2008
• Status: Active Grant

• Current Assignee: Oracle America, Inc. (Oracle Corporation)
• Original Assignee: Sun Microsystems Incorporated (Oracle Corporation)
• Inventors: Hopkins, R. David, Drost, Robert J., Chow, Alex
• Granted Patent: US 8,975,752 B2
• Time in Patent Office: Days
• US Class Current: 455/41.100
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06531 Non-galvanic coupling, e.g. capacitive coupling
• CPC Class Codes: H01L 23/48 Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/642 Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 24/06 of a plurality of bonding areas
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01023 Vanadium [V]
• CPC Class Codes: H01L 2924/01027 Cobalt [Co]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01043 : Technetium [Tc]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01065 : Terbium [Tb]
• CPC Class Codes: H01L 2924/01066 : Dysprosium [Dy]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19015 : including thin film passive components
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H04B 5/22 : Capacitive coupling
• CPC Class Codes: H04B 5/24 : Inductive coupling
• CPC Class Codes: H04B 5/26 : using coils
• CPC Class Codes: H04B 5/72 : for local intradevice communication

Abstract

A multiple access Proximity Communication system in which electrical elements on an integrated circuit chip provide the multiplexing of multiple signals to a single electrical receiving element on another chip. Multiple pads formed on one chip and receiving separate signals may be capacitively coupled to one large pad on the other chip. Multiple inductive coils on one chip may be magnetically coupled to one large coil on another chip or inductive coils on three or more chips may be used for either transmitting or receiving. The multiplexing may be based on time, frequency, or code.

Claims

1. An inter-substrate communication system, comprising:

a plurality of substrates arranged together in a stack;

on at least a first one of the substrates, a plurality of electrical transmitting elements;

on at least another of the substrates, an electrical receiving element electrically coupled to the electrical transmitting elements.

2. The system of claim 1, wherein the electrical transmitting and receiving elements form capacitively coupled elements therebetween.

3. The system of claim 2, wherein the electrical transmitting elements include a plurality of transmitting pads and the electrical receiving unit includes a receiving pad in physical opposition to all of the transmitting pads.

4. The system of claim 2, wherein the electrical transmitting elements include plurality of transmitting pads divided into a plurality of groups of transmitting pads and the electrical receiving unit includes a plurality of receiving pads in physical opposition to all of respective groups of the transmitting pads.

5. The system of claim 2, further comprising an intermediate pad incorporated in the first substrate.

6. The system of claim 1, wherein the electrical transmitting and receiving elements form inductively coupled elements therebetween.

7. The system of claim 6, wherein the electrical transmitting element includes a plurality of first inductive loops.

8. The system of claim 7, wherein the electrical receiving element includes a second inductive loop in opposition to all of the first inductive loops.

9. The system of claim 6, wherein the electrical transmitting elements includes a plurality of separately driven conductors arranged in a transmitting loop.

10. The system of claim 9, wherein the electrical receiving element includes an inductive loop in opposition to the transmitting loop.

11. The system of claim 1, wherein the first one of the substrates includes a plurality lines conveying multiplexed data signals multiplexed between them to the respective transmitting elements.

12. The system of claim 11, wherein the multiplexed data signals are time multiplexed between them.

13. The system of claim 12, wherein the multiplexed data signals are frequency multiplexed between them.

14. The system of claim 12, wherein the multiplexed data signals are code division multiplexed between them according to respective sequences of code signals.

15. The system of claim 14, wherein the another substrates includes a plurality of demultiplexers which mix the signal received from the electrical receiving element with the respective sequences of code signals.

16. An inter-substrate communication system, comprising:

a first substrate having formed on its surface a plurality of transmitting pads and including respective drivers receiving respective data signals and driving respective ones of the transmitting pads; and

a second substrate positioned adjacent to the first substrate and having formed on its surface a receiving pad in opposition to and capacitively coupled to all of the transmitting pads and including a demultiplexer receiving a received signal from the receiving pad and separating it into demultiplexed signals in correspondence to the respective data signals.

17. The system of claim 16, wherein an area of the receiving pad is larger than an area encompassing all of the transmitting pads.

18. An inter-chip communication system, comprising:

a plurality of chips arranged together in a stack; and

respective inductive elements formed on each of the plurality of chips and aligned therebetween.

19. The system of claim 18, wherein the inductive elements each include inductive loops.

20. The system of claim 18, further comprising:

an electrical driver applying a signal to one of the inductive loops; and

a plurality of receivers receiving the signal from respective ones of the inductive loops.