Method, system, and apparatus for dynamic clock adjustment

• US 20090177904A1
• Filed: 03/05/2009
• Published: 07/09/2009
• Est. Priority Date: 06/30/2006
• Status: Active Grant

• Current Assignee: Tahoe Research Limited (f/k/a Learndale Limited) (Vector Capital Corporation)
• Original Assignee: Edward Standford, Frank William Kern
• Inventors: Standford, Edward, Kern, Frank William
• Granted Patent: US 8,065,543 B2
• Time in Patent Office: Days
• US Class Current: 713/322
• CPC Class Codes: G06F 11/24 Marginal checking or other specified testing methods not covered by G06F11/26, e.g. race tests

Abstract

A method, apparatus, article of manufacture, and system, the method including, in some embodiments, determining an impedance of a power distribution network of a load for a range of frequencies, and adjusting a functionality of the load based on a relationship between the impedance of the power distribution network for the range of frequencies and the functionality of the load.

Claims

1. A method of managing a power distribution network, comprising:

powering on a device coupled to the power distribution network, the device receiving a clock signal and the power distribution network including a voltage regulator to supply power to the device; and

initiating a test of the device upon power-on, the test including;

determining impedance related data based on the operation of the device, the impedance related data based on voltage information and clock speed information;

storing the impedance related data over a range of operating conditions;

evaluating the operation of the device based on the stored impedance related data; and

adjusting the operation of the device based on the evaluation.

2. The method of claim 1, wherein initiating the test of the device upon power-on comprises:

initiating a self-test of the device upon power-on.

3. The method of claim 2, wherein the self-test is performed automatically upon power-on of the device.

4. The method of claim 3, wherein the device includes a processor.

5. The method of claim 3, wherein the device includes a multi-core microprocessor.

6. The method of claim 3, wherein the device includes a core of a multi-core microprocessor.