Spread Spectrum Clock Interoperability Control and Inspection Circuit
First Claim
1. A clock interoperability circuit, comprising:
- (a) an input circuit for receiving a first spread spectrum clock signal from an external device, said input circuit having a converter circuit that converts said first spread spectrum clock signal to a second demodulated signal;
(b) a memory circuit that stores a predetermined mask, in which said mask comprises at least one data attribute that is to be used for inspecting said second demodulated signal; and
(c) a compare logic circuit that is configured;
(i) to read said at least one data attribute of said predetermined mask, and use said at least one data attribute to define a set of boundary conditions;
(ii) to read said second demodulated signal from said input circuit, and determine a wave shape of a modulation profile of said second demodulated signal; and
(iii) to compare the wave shape of said second demodulated signal'"'"'s modulation profile to said set of boundary conditions, and determine whether the wave shape of said second demodulated signal'"'"'s modulation profile is statistically within said set of boundary conditions.
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Accused Products
Abstract
A spread spectrum clock generator (SSCG) control and inspection circuit provides a system and method for inspecting and controlling an external SSCG, and for verifying the modulation profile waveform of an external SSCG. An electronic circuit is included that can check for the presence of an optimal SSCG modulation profile in product subsystems, and in attached modular systems, including electronic plug-in features such as internal network adapters and cartridges. In one mode of the invention, an electronic circuit ensures continued radiated emissions compliance for field replaceable units or consumable parts within a product, such as a printer, a scanner, or a combination (or all-in-one) printer/scanner. In another mode of the invention, an electronic circuit may also act as a secondary security device for consumable products, such as toner cartridges or ink jet cartridges. In yet another mode of the invention, an electronic circuit may also adjust the attached SSCG clock.
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Citations
23 Claims
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1. A clock interoperability circuit, comprising:
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(a) an input circuit for receiving a first spread spectrum clock signal from an external device, said input circuit having a converter circuit that converts said first spread spectrum clock signal to a second demodulated signal; (b) a memory circuit that stores a predetermined mask, in which said mask comprises at least one data attribute that is to be used for inspecting said second demodulated signal; and (c) a compare logic circuit that is configured; (i) to read said at least one data attribute of said predetermined mask, and use said at least one data attribute to define a set of boundary conditions; (ii) to read said second demodulated signal from said input circuit, and determine a wave shape of a modulation profile of said second demodulated signal; and (iii) to compare the wave shape of said second demodulated signal'"'"'s modulation profile to said set of boundary conditions, and determine whether the wave shape of said second demodulated signal'"'"'s modulation profile is statistically within said set of boundary conditions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A spread spectrum clock signal inspection circuit, comprising:
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(a) a demodulation circuit that receives from a device a first spread spectrum clock signal, said first spread spectrum clock signal having a modulation profile, said demodulation circuit converting said first spread spectrum clock signal to a second analog signal; (b) a low pass filter circuit that receives said second analog signal, and outputs a third analog signal; (c) a plurality of offset circuits that receive said third analog signal, and that output a plurality of fourth analog signals, said offset circuits having predetermined offset values; and (d) a plurality of comparator circuits that receive said second analog signal from said demodulation circuit and said plurality of fourth analog signals from said plurality of offset circuits, said comparator circuits outputting a plurality of fifth digital signals; wherein logic states of said plurality of fifth digital signals are indicative of whether or not a waveform of said first spread spectrum clock signal modulation profile is within predetermined values, as determined by said predetermined offset values of the plurality of offset circuits. - View Dependent Claims (14, 15, 16)
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17. A method for inspecting a spread spectrum clock signal, comprising:
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(a) providing a subsystem device which includes a first spread spectrum clock generator circuit that generates a first spread spectrum clock signal; (b) outputting said first spread spectrum clock signal using a first output circuit; (c) determining, at a device in communication with the subsystem, a modulation profile waveform of said first spread spectrum clock signal; (d) determining, at said device in communication with the subsystem, a set of boundary conditions; (e) comparing, at said device in communication with the subsystem, said modulation profile waveform of said first spread spectrum clock signal to said set of boundary conditions; and (f) determining, at said device in communication with the subsystem, and based upon said comparison, whether the modulation profile waveform of said first spread spectrum clock signal is statistically within said set of boundary conditions. - View Dependent Claims (18, 19, 20, 21, 22, 23)
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Specification