Oxidation-Free Copper Metallization Process Using In-situ Baking

• US 20090181164A1
• Filed: 01/11/2008
• Published: 07/16/2009
• Est. Priority Date: 01/11/2008
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Wang, Ying-Lang, Wu, Szu-An, Chen, Kei-Wei, Wang, Yu-Sheng, Lin, Shih-Ho
• Granted Patent: US 8,470,390 B2
• Time in Patent Office: Days
• US Class Current: 427/97.600
• CPC Class Codes: H01L 21/02063 the processing being the formation of vias or contact holes
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76828 thermal treatment
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric

Abstract

A method of forming an integrated circuit structure includes providing a substrate; forming a metal feature over the substrate; forming a dielectric layer over the metal feature; and forming an opening in the dielectric layer. At least a portion of the metal feature is exposed through the opening. An oxide layer is accordingly formed on an exposed portion of the metal feature. The method further includes, in a production tool having a vacuum environment, performing an oxide-removal process to remove the oxide layer. Between the step of forming the opening and the oxide-removal process, no additional oxide-removal process is performed to the metal feature outside the production tool. The method further includes, in the production tool, forming a diffusion barrier layer in the opening, and forming a seed layer on the diffusion barrier layer

Claims

1. A method of forming an integrated circuit structure, the method comprising:

providing a substrate;

forming a metal feature over the substrate;

forming a dielectric layer over the metal feature;

forming an opening in the dielectric layer, wherein at least a portion of the metal feature is exposed through the opening, and wherein an oxide layer is formed on an exposed portion of the metal feature;

in a production tool having a vacuum environment, performing an oxide-removal process to remove the oxide layer, wherein between the step of forming the opening and the oxide-removal process, no additional oxide-removal process is performed to the metal feature outside the production tool;

in the production tool, forming a diffusion barrier layer in the opening; and

in the production tool, forming a seed layer on the diffusion barrier layer.

2. The method of claim 1, wherein no vacuum-break occurs between the steps of performing the oxide-removal process and forming the seed layer.

3. The method of claim 2, wherein the steps of performing the oxide-removal process, forming the diffusion barrier layer, and forming the seed layer are performed in different chambers of the production tool, and wherein when the substrate is transferred between the different chambers, the production tool has a pressure of lower than about 1 torr.

4. The method of claim 1, wherein the metal feature comprises copper.

5. The method of claim 1, wherein the oxide-removal process comprises reducing the oxide layer to metal.

6. The method of claim 5, wherein the step of reducing the oxide layer comprises baking the substrate in a hydrogen-containing environment.

7. A method of forming an integrated circuit structure, the method comprising:

providing a substrate;

forming a metal feature over the substrate;

forming a dielectric layer over the metal feature;

forming an opening in the dielectric layer, wherein at least a portion of the metal feature is exposed through the opening, and wherein an oxide layer is formed on an exposed portion of the metal feature;

in a production tool having a vacuum environment, baking the substrate, wherein a process gas for reducing the oxide layer to metal is introduced to the production tool when the substrate is being baked;

forming a diffusion barrier layer in the opening; and

forming a seed layer on the diffusion barrier layer, wherein the steps of forming the diffusion barrier layer and forming the seed layer are performed in the production tool.

8. The method of claim 7, wherein the process gas used for baking the substrate comprises hydrogen.

9. The method of claim 7, wherein between the step of forming the opening and the step of baking the substrate in the production tool, the oxide layer is free from reduction steps.

10. The method of claim 7, wherein the steps of baking the substrate, forming the diffusion barrier layer, and forming the seed layer are each formed in a first, a second, and a third chamber of the production tool, respectively.

11. The method of claim 10, wherein between the steps of forming the diffusion barrier layer and forming the seed layer, the substrate is transferred through a transfer chamber having a pressure of less than about 1 torr.

12. The method of claim 11, wherein during the step of baking the substrate, the first chamber has a pressure of less than about 20 torrs.

13. The method of claim 7 further comprising, after forming the seed layer, taking the substrate out of the production tool, and performing a plating to fill the remaining portion of the opening.

14. A method of forming an integrated circuit structure, the method comprising:

providing a substrate;

providing a production tool comprising a baking chamber, a first and a second deposition chamber, and a transfer chamber for transferring wafers between the baking chamber and the first and the second deposition chambers;

forming a first dielectric layer over the substrate;

forming a copper line in the first dielectric layer;

forming a second dielectric layer over the copper line and the first dielectric layer, wherein the second dielectric layer has a low k value;

forming an opening in the second dielectric layer, wherein at least a portion of the copper line is exposed through the opening, and wherein a copper oxide layer is formed on an exposed portion of the copper line;

baking the substrate in the first deposition chamber of the production tool, wherein hydrogen is introduced into the first deposition chamber during the step of baking;

transferring the substrate from the baking chamber to the first deposition chamber through the transfer chamber, wherein no vacuum break occurs in the production tool;

in the first deposition chamber, forming a diffusion barrier layer in the opening;

transferring the substrate from the first deposition chamber to the second deposition chamber through the transfer chamber, wherein no vacuum break occurs in the production tool;

in the second deposition chamber, forming a seed layer on the diffusion barrier layer; and

plating copper on the seed layer to fill the opening.

15. The method of claim 14, wherein during the step of transferring the substrate from the baking chamber to the first deposition chamber and the step of transferring the substrate from the first deposition chamber to the second deposition chamber, the transfer chamber has a pressure of less than about 1 torr.

16. The method of claim 14, wherein during the step of baking the substrate, the baking chamber has a pressure of less than about 20 torrs, and the substrate has a temperature of higher than about 150°

C.

17. The method of claim 14, wherein between the step of forming the opening and the step of baking the substrate in the baking chamber, the substrate is free from being baked in hydrogen-containing processes.

18. The method of claim 14 further comprising performing a planarization to remove excess copper outside of the opening.