THIN FILM TRANSISTOR ARRAY SUBSTRATE HAVING IMPROVED ELECTRICAL CHARACTERISTICS AND METHOD OF MANUFACTURING THE SAME

• US 20090184315A1
• Filed: 01/16/2009
• Published: 07/23/2009
• Est. Priority Date: 01/18/2008
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Je-Hun, Jeong, Chang-Oh, Kim, Do-Hyun, Yoon, Kap-Soo, Son, Kyung-Seok
• Granted Patent: US 7,956,947 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1296 adapted to increase the uniformity of device parameters
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A thin film transistor array substrate, which can have high mobility of charge and can achieve uniform electrical characteristics for wide display devices, and a method of manufacturing the thin film transistor array substrate, are provided. The thin film transistor array substrate includes an oxide semiconductor layer having a channel and formed on an insulating substrate, a gate electrode overlapping the oxide semiconductor layer, a gate insulating film disposed between the oxide semiconductor layer and the gate electrode, and a passivation film formed on the oxide semiconductor layer and the gate electrode. At least one of the gate insulating film and the passivation film contains fluorine-containing silicon.

Claims

1. A thin film transistor array substrate comprising:

an oxide semiconductor layer;

a gate electrode overlapping the oxide semiconductor layer;

a gate insulating film disposed between the oxide semiconductor layer and the gate electrode; and

a passivation film formed on the oxide semiconductor layer and the gate electrode;

wherein at least one of the gate insulating film and the passivation film contains fluorine-containing silicon.

2. The thin film transistor array substrate of claim 1, wherein the fluorine-containing silicon is fluorine-containing silicon nitride, fluorine-containing silicon oxide, or fluorine-containing silicon oxynitride.

3. The thin film transistor array substrate of claim 2, wherein the fluorine-containing silicon is SiOF, SiNF, SiONF, or SiOCF.

4. The thin film transistor array substrate of claim 1, wherein the passivation film includes:

a first passivation film formed of fluorine-containing silicon and

a second passivation film.

5. The thin film transistor array substrate of claim of claim 4, wherein the thickness of the first passivation film is 3 nm or more.

6. The thin film transistor array substrate of claim 1, wherein the gate insulating film includes:

a first insulating film formed of fluorine-containing silicon and

a second insulating film.

7. The thin film transistor array substrate of claim 6, wherein the thickness of the first insulating film is 3 nm or more.

8. The thin film transistor array substrate of claim 1, wherein the oxide semiconductor layer is an oxide of a material selected from Zn, In, Ga, Sn, and their combination.

9. The thin film transistor array substrate of claim 1, further comprising a source electrode and a drain electrode formed on the oxide semiconductor layer, wherein and the source electrode and the drain electrode have an upper TiN film and a lower Cu film.

10. A method of manufacturing a thin film transistor array substrate, comprising:

forming a thin film transistor structure having an oxide semiconductor layer, a gate electrode overlapping the oxide semiconductor layer, and a gate insulating film therebetween; and

forming a passivation film on the oxide semiconductor layer and the gate electrode;

wherein at least one of the gate insulating film and the passivation film contains fluorine-containing silicon.

11. The method of claim 10, wherein the forming the at least one of the gate insulating film and a passivation film comprises forming the fluorine-containing silicon by reaction gases without hydrogen.

12. The method of claim 11, wherein the forming the fluorine-containing silicon further comprises forming the fluorine-containing silicon by reacting a first reaction gas containing Si and F with a second reaction gas containing O, N, or F.

13. The method of claim 12, wherein the first reacting gas is at least one of SiF, SiF₂, SiF₃, and SiF₄ and the second reaction gas is at least one of NO, N₂O, O₂, NF, NF₂, and NF₃.

14. The method of claim 10, wherein the forming the fluorine-containing silicon further comprises forming the fluorine-containing silicon by reacting a first reaction gas containing fluorine with a second reaction gas containing hydrogen

15. The method of claim 14, wherein the first reaction gas is at least one of SiF, SiF₂, SiF₃, and SiF₄ and the second reaction gas is at least one of NH₂ and NH₃.

16. The method of claim 14, wherein the first reaction gas is at least one of NF, NF₂, and NF₃ and the second reaction gas includes SiH₄.

17. The method of claim 10, wherein the fluorine-containing silicon is fluorine-containing silicon nitride, fluorine-containing silicon oxide, or fluorine-containing silicon oxynitride.

18. The method of claim 17, wherein the fluorine-containing silicon is SiOF, SiNF, SiONF, or SiOCF.

19. The method of claim 10, wherein the oxide semiconductor layer is an oxide of a material that is at least one of Zn, In, Ga, and Sn.

20. A thin film transistor array substrate comprising:

an oxide semiconductor layer;

a gate electrode overlapping the oxide semiconductor layer;

a gate insulating film disposed between the oxide semiconductor layer and the gate electrode; and

a passivation film formed on the oxide semiconductor layer and the gate electrode;

wherein the gate insulating film and the passivation film contains fluorine-containing silicon.