MEMORY SYSTEM AND METHOD WITH SERIAL AND PARALLEL MODES

• US 20090185442A1
• Filed: 03/27/2009
• Published: 07/23/2009
• Est. Priority Date: 12/12/2006
• Status: Active Grant

• Current Assignee: Mosaid Technologies Incorporated (MOSAID Technologies Inc. (f/k/a Conversant Intellectual Property Management))
• Original Assignee: Mosaid Technologies Incorporated (MOSAID Technologies Inc. (f/k/a Conversant Intellectual Property Management))
• Inventors: OH, HakJune, PYEON, Hong Beom, KIM, Jin-Ki
• Granted Patent: US 8,169,849 B2
• Time in Patent Office: Days
• US Class Current: 365/220
• CPC Class Codes: G11C 2207/107 Serial-parallel conversion of data or prefetch
• CPC Class Codes: G11C 7/1006 Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
• CPC Class Codes: G11C 7/1045 Read-write mode select circuits
• CPC Class Codes: G11C 7/1051 Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
• CPC Class Codes: G11C 7/1075 for multiport memories each having random access ports and serial ports, e.g. video RAM
• CPC Class Codes: G11C 7/1078 Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits

Abstract

Methods and systems are provided that allow the method of access to one or more memory banks to be performed using serial access, or using parallel access. In serial mode, each link operates as an independent serial link. In contrast, during serial mode, the links operate in common as a parallel link. Where input and output controls are received independently for each link for serial mode, a single set of input and output controls is used in common by all of the links during parallel mode.

Claims

1. An interface for use in a memory system having a memory bank, the interface being configured to be operable with a plurality of modes to connect a plurality of inputs and a plurality of outputs to the memory bank, the interface having a serial mode during which each of at least one input of the plurality of inputs operates as a respective serial input and each of at least one output of the plurality of outputs operates as a respective serial output, the interface having a parallel mode during which the plurality of inputs operate collectively as a parallel input and the plurality of outputs operate collectively as a parallel output.

2. A method for interfacing with a memory system having a memory bank, the method comprising connecting a plurality of inputs and a plurality of outputs to the memory bank, each of at least one input of the plurality of inputs operating as a respective serial input, each of at least one output of the plurality of outputs operating as a respective serial output.