Communication System, Transmitter, Receiver and Multiple Access Method

• US 20090185635A1
• Filed: 06/15/2007
• Published: 07/23/2009
• Est. Priority Date: 06/27/2006
• Status: Active Grant

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Okello, James Awuor
• Granted Patent: US 8,411,779 B2
• Time in Patent Office: Days
• US Class Current: 375/267
• CPC Class Codes: H04B 1/7107 Subtractive interference cancellation
• CPC Class Codes: H04B 7/0613 using simultaneous transmission H04B7/0686 takes precedence
• CPC Class Codes: H04B 7/0837 using pre-detection combining H04B7/0868 takes precedence
• CPC Class Codes: H04L 2025/03407 Continuous phase
• CPC Class Codes: H04L 2025/03426 transmission using multiple-input and multiple-output channels
• CPC Class Codes: H04L 25/0305 using blind adaptation
• CPC Class Codes: H04L 25/03343 Arrangements at the transmitter end
• CPC Class Codes: H04L 25/03866 using scrambling

Abstract

In a communications system including a transmitter for transmitting signals over a transmission channel and a receiver for receiving the signals, the transmitter includes: a filter for filtering a modulated signal to modify amplitude and phase characteristics of the modulated signal; and a first processor for performing interleaving process and/or scrambling process for the filtered signal. On the other hand, the receiver includes: a second processor for performing deinterleaving process and/or descrambling process for a received signal; and an inverse filter for filtering a signal supplied from the second processor.

Claims

1. A communications system comprising:

a transmitter for transmitting signals of at least two data streams over a common transmission channel; and

a receiver for receiving signals,

wherein said transmitter comprises;

a plurality of filters with the same frequency and phase response characteristics for filtering each of modulated signals of the at least two data streams to modify amplitude and phase characteristics of the modulated signals; and

a first processor for performing a different interleaving process and/or a different scrambling process for the filtered signals, and

wherein said receiver comprises;

a second processing means processor for performing a deinterleaving process and/or a descrambling process, which corresponds to the interleaving process and/or the scrambling process performed in the first processing means processor, for received signals; and

a plurality of inverse filters for filtering signals supplied from the second processor, said plurality of inverse filters having inverse frequency and phase response characteristics of the plurality of filters disposed in the transmitter.

2. The communications system according to claim 1, wherein the first processor includes:

a plurality of different interleavers which interleave outputs of the filtered signals as the different interleaving process; and

a plurality of different scramblers which scramble the interleaved signals as the different scrambling process,

wherein the second processor includes;

a plurality of descramblers which correspond to the plurality of different scramblers and descramble the received signals; and

a plurality of deinterleavers which correspond to the plurality of different interleavers and deinterleave the descrambled signals, and

wherein the plurality of inverse filters filter the deinterleaved signals.

3. The communications system according to claim 1, wherein the first processor includes:

a plurality of different scramblers which scramble outputs of the filtered signals as the different scrambling process; and

a plurality of different interleavers which interleave the scrambled signals as the different interleaving process,

wherein the second processor includes;

a plurality of deinterleavers which correspond to the plurality of different interleavers and deinterleave the received signals; and

a plurality of descramblers which correspond to the plurality of different scramblers and descramble the signals after being deinterleaved, and

wherein the plurality of inverse filters filter the descrambled signals.

4. The communications system according to claim 1, wherein the first processor includes a plurality of different scramblers which scramble outputs of the filtered signals as the different scrambling process,

wherein the second processor includes a plurality of descramblers which correspond to the plurality of different scramblers and descramble the received signals, and

wherein the plurality of inverse filters filter the descrambled signals.

5. The communications system according to claim 1, wherein the first processor includes a plurality of different interleavers which interleave the filtered signals as the different interleaving process,

wherein the second processor includes a plurality of deinterleavers which correspond to the plurality of different interleavers and deinterleave the received signals, and

wherein the plurality of inverse filters filter the deinterleaved signals.

7. The communications system according to claim 1, wherein the plurality of filters are assigned to a plurality of users or sources, and frequency spectrums of all the filters assigned to the respective users or sources overlap to each other.

8. The communications system according to claim 1, wherein the plurality of filters within the transmitter comprise non-linear filters.

9. The communications system according to claim 1, wherein the plurality of filters within the transmitter comprise linear filters.

10. The communications system according to claim 9, wherein the linear filter comprises an allpass filter.

6. (canceled)

11. A transmitter for transmitting signals of at least two data streams over a common transmission channel, comprising:

a plurality of filters with same frequency and phase response characteristics for filtering each of modulated signals of the at least two data streams to modify amplitude and phase characteristics of the modulated signals; and

a processor for performing a different interleaving process and/or a different scrambling process for the filtered signals.

12. The transmitter according to claim 11, wherein the processor includes:

a plurality of different interleavers which interleave outputs of the filtered signals as the different interleaving process; and

a plurality of different scramblers which scramble the interleaved signals as the different scrambling process.

13. The transmitter according to claim 11, wherein the processor includes:

a plurality of different scramblers which scramble outputs of the filtered signals as the different scrambling process; and

a plurality of different interleavers which interleave the scrambled signals as the different interleaving process.

14. The transmitter according to claim 11, wherein the processor includes a plurality of different scramblers which scramble outputs of the filtered signals as the different scrambling process.

15. The transmitter according to claim 11, wherein the processor includes a plurality of different interleavers which interleave the filtered signals as the different interleaving process.

17. The transmitter according to claim 11, wherein the plurality of filters are assigned to a plurality of users or sources, and frequency spectrums of all the filters assigned to the respective users or sources overlap to each other.

18. The transmitter according to claim 11, wherein the plurality of filters comprise non-linear filters.

19. The transmitter according to claim 11, wherein the plurality of filters comprise linear filters.

20. The transmitter according to claim 19, wherein the linear filter comprises an allpass filter.

16. (canceled)

21. A receiver for receiving signals, comprising:

a processor for performing a deinterleaving process and/or a descrambling process, which corresponds to an interleaving process and/or a scrambling process performed in a transmitter, for received signals; and

a plurality of inverse filters for filtering signals supplied from the processor.

22. The receiver according to claim 21, wherein the a processor includes:

a plurality of descramblers which correspond to the different scrambling process and descramble the received signals; and

a plurality of deinterleavers which correspond to the different interleaving process and deinterleave the descrambled signal, and

wherein the plurality of inverse filters filter the deinterleaved signals.

23. The receiver according to claim 21, wherein the processor includes:

a plurality of deinterleavers which correspond to the different interleaving process and deinterleave the received signals; and

a plurality of descramblers which correspond to the different scrambling process and descramble the signals after being deinterleaved, and,

wherein the plurality of inverse filters filter the descrambled signals.

24. The receiver according to claim 21, wherein the processor includes a plurality of descramblers which correspond to the different scrambling process and descramble the received signals, and

wherein the plurality of inverse filters filter the descrambled signals.

25. The receiver according to claim 21, wherein the processor includes a plurality of deinterleavers which correspond to the different interleaving process and deinterleave the received signals, and

wherein the plurality of inverse filters filter the deinterleaved signals.

26. (canceled)

27. (canceled)

28. (canceled)