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CIRCUIT ARRANGEMENT AND METHOD FOR RSA KEY GENERATION

  • US 20090185681A1
  • Filed: 08/09/2006
  • Published: 07/23/2009
  • Est. Priority Date: 08/19/2005
  • Status: Active Grant
First Claim
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1. A circuit arrangement, in particular an integrated circuit, such as a mathematical coprocessor, for performing at least one operation, in particular at least one cryptographic calculation,characterized inthat at least one, preferably two, prime numbers for key generation, in particular for R[ivest-]S[hamir-]A[dleman] key generation, are searched in compliance with at least one defined digital signature law, in particular with the German Digital Signature Law.

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