SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20090186445A1
• Filed: 03/26/2009
• Published: 07/23/2009
• Est. Priority Date: 11/15/2005
• Status: Abandoned Application

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: AKIMOTO, Kengo
• Application Number:
  US12/411,900
• Publication Number:
  US 20090186445A1
• Time in Patent Office: Days
• US Class Current: 438/104
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.

Claims

1. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:

forming the gate insulating film by using a microwave,

wherein the channel formation region comprises an oxide semiconductor material.

2. The method according to claim 1 wherein the microwave has a frequency of 2.45 GHz.

3. The method according to claim 1 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.

4. The method according to claim 1 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.

5. The method according to claim 1 wherein the oxide semiconductor material includes zinc oxide.

6. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:

forming the gate insulating film by using a plasma having an electron density from 1×

10¹¹ to 1×

10¹³/cm³,

wherein the channel formation region comprises an oxide semiconductor material.

7. The method according to claim 6 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.

8. The method according to claim 6 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.

9. The method according to claim 6 wherein the oxide semiconductor material includes zinc oxide.

10. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:

forming the gate insulating film by using a plasma having an electron temperature 2 eV or less,

wherein the channel formation region comprises an oxide semiconductor material.

11. The method according to claim 10 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.

12. The method according to claim 10 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.

13. The method according to claim 10 wherein the oxide semiconductor material includes zinc oxide.

15. The method according to claim 10 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.

16. The method according to claim 10 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.

17. The method according to claim 10 wherein the oxide semiconductor material includes zinc oxide.

14. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:

forming the gate insulating film by using a plasma generated by using a microwave, the plasma having an electron density from 1×

10¹¹ to 1×

10¹³/cm³,

wherein the channel formation region comprises an oxide semiconductor material.

18. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:

forming the gate insulating film by using a plasma generated by using a microwave, the plasma having an electron temperature 2 eV or less,

wherein the channel formation region comprises an oxide semiconductor material.

19. The method according to claim 18 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.

20. The method according to claim 18 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.

21. The method according to claim 18 wherein the oxide semiconductor material includes zinc oxide.