RETARGETING OF A WRITE OPERATION RETRY IN THE EVENT OF A WRITE OPERATION FAILURE

• US 20090187700A1
• Filed: 01/18/2008
• Published: 07/23/2009
• Est. Priority Date: 01/18/2008
• Status: Active Grant

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Spansion LLC (Infineon Technologies AG)
• Inventors: Chan, Peter, Kern, William
• Granted Patent: US 8,694,714 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks

Abstract

Methods and systems are herein disclosed for write operation retry using the data stored and retained in an internal buffer within the non-volatile memory device. By using the data stored in the internal buffer, the systems and method of the present invention eliminate the need to include a dedicated retry buffer at the system level. Thereby, reducing the system cost, minimizing space consumption on a board within the system and, in some instance, limiting the latency attributed to a retry that relies on retrying the write based on re-transferring of the data contents to the internal non-volatile memory buffer.

Claims

1. A memory system for providing non-volatile write operation retry, comprising:

a first non-volatile memory device including a buffer that retains data associated with a failed write operation; and

a volatile memory in communication with the first non-volatile memory device and including write operation retry logic operable to receive notice of the write operation failure from the first non-volatile memory device and attempt a first write operation retry using data retained in the buffer.

2. The memory system of claim 1, wherein the write operation retry logic is further operable to provide a retarget address to the first non-volatile memory device, wherein the first non-volatile memory device attempts to write the data in the first buffer to the retarget address.

3. The memory system of claim 1, wherein the write operation retry logic is further operable to transfer the data in the buffer to a second non-volatile memory device.

4. The memory system of claim 3, wherein the write operation retry logic is further operable to issue a read command to the first non-volatile memory device and issue a write command to the second non-volatile device.

5. The memory system of claim 1, wherein the write operation retry logic is further operable to attempt a second write operation retry based on data stored in the buffer of the first non-volatile memory device, if the first write operation retry is unsuccessful.

6. The memory system of claim 5, wherein the write operation retry logic is further operable to attempt a first write operation retry operable to provide a retarget address to the first non-volatile memory device, wherein the first non-volatile memory device attempts to write the data in the buffer to the retarget address and attempt a second write operation retry-operable to transfer the data in the buffer to a second non-volatile memory device.

7. The memory system of claim 5, wherein the write operation logic is further operable to attempt a first write operation retry operable to transfer the data in the buffer to a second non-volatile memory device and attempt a second write operation retry operable to provide a retarget address to the first non-volatile memory device, wherein the first non-volatile memory device attempts to write the data in the buffer to the retarget address.

8. The memory system of claim 1, wherein the write operation logic is further operable to determine a write operation retry from a first retry comprising providing a retarget address to the first non-volatile memory device, wherein the first non-volatile memory device attempts to write the data in the first buffer to the retarget address or a second retry comprising transferring the data to a second non-volatile device.

9. The memory system of claim 1, wherein the first non-volatile memory device including a buffer that retains data associated with a failed write operation further defines the buffer as a NAND page buffer.

10. An electronic device comprising the system of claim 1.

11. The electronic device of claim 10, the electronic device is one of a computer, a cellular phone, a digital phone, a video device, a smart card, a personal digital assistant, a television, an electronic game, a digital camera, an electronic organizer, an audio player, an audio recorder, an electronic device associated with digital rights management, a Personal Computer Memory Card International Association (PCMCIA) card, a trusted platform module (TPM), an electronic control unit associated with a motor vehicle, a global positioning satellite (GPS) device, an electronic device associated with an airplane, an electronic device associated with an industrial control system, a Hardware Security Module (HSM), a set-top box, a secure memory device with computational capabilities, or an electronic device with at least one tamper-resistant chip.

12. A method for non-volatile write operation retry in a computing system, comprising:

receiving notice of a write operation failure in a first non-volatile memory device; and

attempting a first write operation retry using data retained in a buffer of the first non-volatile memory device.

13. The method of claim 12, wherein attempting a first write operation retry further comprises providing a retarget address to the first non-volatile memory device, wherein the first non-volatile memory device attempts to write the data in the buffer to the retarget address.

14. The method of claim 12, wherein attempting a first write operation retry further comprises transferring the data in the buffer to a second non-volatile memory device.

15. The method of claim 14, wherein transferring the data in the internal buffer to a second non-volatile memory device further comprises issuing a read command to the first non-volatile memory device and issuing a write command to the second non-volatile device.

16. The method of claim 12, further comprising attempting a second write operation retry based on data stored in the internal buffer of the first non-volatile memory device, if the first write operation retry is unsuccessful.

17. The method of claim 16, wherein attempting a first write operation retry further comprises providing a retarget address to the first non-volatile memory device, wherein the first non-volatile memory device attempts to write the data in the buffer to the retarget address and attempting a second write operation retry further comprises transferring the data in the buffer to a second non-volatile memory device.

18. The method of claim 16, wherein attempting a first write operation retry further comprises transferring the data in the buffer to a second non-volatile memory device and attempting a second write operation retry further comprises providing a retarget address to the first non-volatile memory device, wherein the first non-volatile memory device attempts to write the data in the buffer to the retarget address.

19. The method of claim 12, wherein attempting a first write operation retry further comprises logically determining a write operation retry from a first retry comprising providing a retarget address to the first non-volatile memory device, wherein the first non-volatile memory device attempts to write the data in the buffer to the retarget address or a second retry comprising transferring the data in the buffer to a second non-volatile memory device.

20. The method of claim 12, further comprising attempting a second write operation retry based on data stored in system retry buffer, if the first write operation retry is unsuccessful.