INWARD DIELECTRIC SPACERS FOR REPLACEMENT GATE INTEGRATION SCHEME
First Claim
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1. A method for fabricating a semiconductor device, comprising:
- providing a substrate having thereon a placeholder gate electrode disposed in a dielectric layer;
removing said placeholder gate electrode to form a trench in said dielectric layer;
forming a pair of dielectric spacers adjacent to the sidewalls of said trench, wherein said trench has a re-entrant profile, and wherein each dielectric spacer of said pair of dielectric spacers has a tapered profile; and
forming a gate electrode in said trench and adjacent to said pair of dielectric spacers.
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Abstract
Inward dielectric spacers for a replacement gate integration scheme are described. A semiconductor device is fabricated by first providing a substrate having thereon a placeholder gate electrode disposed in a dielectric layer. The placeholder gate electrode is removed to from a trench in the dielectric layer. A pair of dielectric spacers is then formed adjacent to the sidewalls of the trench. Finally, a gate electrode is formed in the trench and adjacent to the pair of dielectric layers.
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Citations
20 Claims
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1. A method for fabricating a semiconductor device, comprising:
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providing a substrate having thereon a placeholder gate electrode disposed in a dielectric layer; removing said placeholder gate electrode to form a trench in said dielectric layer; forming a pair of dielectric spacers adjacent to the sidewalls of said trench, wherein said trench has a re-entrant profile, and wherein each dielectric spacer of said pair of dielectric spacers has a tapered profile; and forming a gate electrode in said trench and adjacent to said pair of dielectric spacers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A semiconductor device, comprising:
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a substrate having thereon a gate electrode disposed in a dielectric layer; a pair of source and drain regions in said substrate on either side of said gate electrode; and a pair of dielectric spacers adjacent to the sidewalls of said gate electrode, wherein each dielectric spacer is between said gate electrode and said dielectric layer, wherein the top portion of each dielectric spacer of said pair of dielectric spacers is flared to form a funnel shape, wherein the portions of said dielectric layer adjacent to said pair of dielectric spacers have a re-entrant profile, and wherein each dielectric spacer of said pair of dielectric spacers has a tapered profile. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A semiconductor device, comprising:
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a substrate having thereon a gate electrode disposed in a dielectric layer; a pair of source and drain regions in said substrate on either side of said gate electrode; and a pair of dielectric spacers adjacent to the sidewalls of said gate electrode, wherein each dielectric spacer is between said gate electrode and said dielectric layer, and wherein said pair of dielectric spacers comprises a material having a dielectric constant approximately in the range of 2.2-3.5. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification