THIN-FILM SOLAR CELL HAVING HETERO-JUNCTION OF SEMICONDUCTOR AND METHOD FOR FABRICATING THE SAME

• US 20090194152A1
• Filed: 02/04/2008
• Published: 08/06/2009
• Est. Priority Date: 02/04/2008
• Status: Abandoned Application

• Current Assignee: National Taiwan University (Government of The Republic of China)
• Original Assignee: National Taiwan University (Government of The Republic of China)
• Inventors: Yu, Cheng-Yeh, Chen, Wen-Yuan, Lin, Chu-Hsuan, Liu, Chee-Wee
• Application Number:
  US12/025,226
• Publication Number:
  US 20090194152A1
• Time in Patent Office: Days
• US Class Current: 136/255
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01L 31/022425 for solar cells
• CPC Class Codes: H01L 31/022433 Particular geometry of the grid contacts
• CPC Class Codes: H01L 31/028 including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/035254 including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table, e.g. Si-SiGe superlattices
• CPC Class Codes: H01L 31/035281 Shape of the body
• CPC Class Codes: H01L 31/072 the potential barriers being only of the PN heterojunction type
• CPC Class Codes: H01L 31/0745 comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
• CPC Class Codes: H01L 31/075 the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/1812 including only AIVBIV alloys, e.g. SiGe
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A thin-film solar cell having a hetero-junction of semiconductor and the fabrication method thereof are provided. Instead of the conventional hetero-junction of III-V semiconductor or homo-structure of IV semiconductor, the thin-film solar cell according to the present invention adopts a novel hetero-junction structure of IV semiconductor to improve the cell efficiency thereof. By adjusting the amount of layer sequences and the thickness of the hetero-junction structure, the cell efficiency of the thin-film solar cell according to the present invention is also optimized.

Claims

1. A thin-film solar cell, comprising:

a substrate having a first surface;

a multi-layered structure disposed on the first surface, wherein the multi-layered structure is made of different semiconductor materials selected from elements of the same group;

a first electrode layer disposed on the multi-layered structure, wherein the first electrode layer is a ring shaped structure having a vacant space formed thereon;

an insulation layer disposed on the vacant space; and

a second electrode layer disposed on the insulation layer and insulated from the first electrode layer.

2. A thin-film solar cell according to claim 1, wherein the substrate is one selected from a group consisting of a relatively low quality silicon substrate, a glass substrate and other relatively cheap substrates.

3. A thin-film solar cell according to claim 1, wherein the multi-layered structure is made of the different semiconductor materials of IV group elements.

4. A thin-film solar cell according to claim 1, wherein the multi-layered structure comprises:

a first silicon layer;

a hetero-structure layer disposed on the first silicon layer; and

a second silicon layer disposed on the hetero-structure layer, wherein the hetero-structure layer is one of a germanium layer and a silicon-germanium layer.

5. A thin-film solar cell according to claim 4, wherein the hetero-structure layer has a thickness ranged from 3 nm to 30 nm.

6. A thin-film solar cell according to claim 1, wherein the multi-layered structure one of a Si/Ge/Si quantum well and a Si/Ge/Si quantum dot.

7. A thin-film solar cell according to claim 1, wherein the multi-layered structure one of a Si/SiGe/Si quantum well and a Si/SiGe/Si quantum dot.

8. A thin-film solar cell according to claim 1, wherein the insulation layer is made of a dielectric material having a dielectric constant lager than 3.

9. A thin-film solar cell according to claim 8, wherein the dielectric material is one of a group consisting of a silicon dioxide, a silicon nitride, and a hafnium oxide.

10. A thin-film solar cell, comprising:

a substrate having a first surface;

a first electrode layer disposed on the first surface;

a multi-layered structure disposed on the first electrode layer, wherein the multi-layered structure has a hetero junction structure formed by different semiconductor materials selected from elements of the same group; and

an insulation layer disposed on the multi-layered structure.

11. A method for fabricating a thin-film solar cell, the thin-film solar cell having a hetero-junction structure formed by different semiconductor materials selected from elements of the same group, the method comprising:

(a) providing a silicon substrate having a first surface and a second surface;

(b) providing a semiconductor layer made of IV group elements on the first surface;

(c) providing a silicon layer on the semiconductor layer, so as to form a hetero-junction structure;

(d) implanting hydrogen ions (H⁺) into the hetero-junction structure, so that an implanted hydrogen ions interface is formed within the silicon substrate; and

(e) providing a carrier substrate bonding to the silicon layer and then heating the hetero-junction structure having the implanted hydrogen ions interface, so that the silicon substrate is exfoliated along the hydrogen ions interface and a exfoliated surface of the silicon substrate is formed.

12. A method according to claim 11, further comprising a step of (e′

) doping the hetero-junction structure after the step (e).

13. A method according to claim 11, further comprising a step of (e″

) planarizing the exfoliated surface after the step (e).

14. A method according to claim 13, further comprising following steps after the step (e″

);

(f) providing a first electrode layer on the exfoliated surface;

(g) forming a vacant space on the central portion of first electrode layer, so as to make the first electrode as a ring shaped structure, wherein an exposed portion of the exfoliated surface is revealed in the vacant space;

(h) providing an insulation layer on the exposed portion of the exfoliated surface; and

(i) providing a second electrode layer on the insulation layer, through which the first electrode layer is insulated from the second electrode layer.

15. A method according to claim 11, wherein the step (e) further comprises:

(e1) providing the carrier substrate having thereon a first electrode layer; and

(e2) bonding the first electrode layer into the silicon layer.

16. A method according to claim 15, further comprising a step of (f) providing a second electrode layer on the exfoliated surface after the step (e).

17. A method according to claim 11, wherein the semiconductor layer and the silicon layer are formed by one of an epitaxial process and a wafer bonding process.

18. A method according to claim 17, wherein the epitaxial process is performed by one selected from a group consisting of a molecular beam epitaxy (MBE) system, a plasma enhanced chemical vapor deposition (PECVD) system, and a ultra high vacuum chemical vapor deposition (UHVCVD) system.

19. A method according to claim 11, wherein the step (b) and the step (c) are alternately and repeatedly performed, so that a multi-layered structure having multiple hetero-junctions is formed.