Thin film transistor, method of manufacturing the same, and flat panel display device having the same
First Claim
1. A thin film transistor (TFT), comprising:
- a substrate;
a gate electrode formed on the substrate;
an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer including a channel region, a source region, and a drain region;
a source electrode and a drain electrode contacting the source region and the drain region; and
the oxide semiconductor layer being formed of an IZO layer (indium zinc oxide layer) layer comprising Zr.
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Accused Products
Abstract
A thin film transistor (TFT) using an oxide semiconductor layer as an active layer, a method of manufacturing the TFT, and a flat panel display (FPD) including the TFT are taught. The TFT includes a gate electrode formed on a substrate, an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer, and the oxide semiconductor layer including a channel region, a source region, and a drain region, and a source electrode and a drain electrode respectively electrically contacting the source region and the drain region. The oxide semiconductor layer is formed of an InZnO or IZO layer (indium zinc oxide layer) including Zr. The carrier density of the IZO layer is controlled to be 1×1013 to 1×1018 #cm−3 by controlling an amount of Zr.
20 Citations
12 Claims
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1. A thin film transistor (TFT), comprising:
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a substrate; a gate electrode formed on the substrate; an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer including a channel region, a source region, and a drain region; a source electrode and a drain electrode contacting the source region and the drain region; and the oxide semiconductor layer being formed of an IZO layer (indium zinc oxide layer) layer comprising Zr. - View Dependent Claims (2)
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3. A method of manufacturing a TFT, comprising:
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forming a gate electrode on a substrate; forming a gate insulating layer covering the gate electrode on the substrate; forming an oxide semiconductor layer that provides a channel region, a source region, and a drain region on the gate insulating layer; forming a source electrode and a drain electrode that respectively contact the source region and the drain region; and the step of forming an oxide semiconductor layer further comprising the step of depositing ions including In, Zn, and Zr from a target to form an IZO layer (indium zinc oxide layer) layer comprising Zr on the gate insulating layer. - View Dependent Claims (4, 5, 6, 7, 8)
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9. A flat panel display (FPD), comprising:
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a first substrate where a plurality of pixels are defined by a plurality of first and second conductive lines, a thin film transistor (TFT) of each of the plurality of pixels controls signals supplied to the each of the plurality of pixels, and the TFT is electrically coupled to a first electrode; a second substrate where a second electrode is formed and the second substrate is spaced apart from the first substrate; a liquid crystal layer injected into a sealed up space between the first electrode and the second electrode; and the TFT further comprising; a gate electrode formed on the first substrate; an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer and the oxide semiconductor layer including a channel region, a source region, and a drain region; a source electrode and a drain electrode respectively electrically contacting the source region and the drain region; and the oxide semiconductor layer being formed of an IZO layer (indium zinc oxide layer) including Zr. - View Dependent Claims (10)
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11. A flat panel display (FPD), comprising:
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a first substrate where organic light emitting diodes (OLEDs) each comprising a first electrode, an organic thin film layer, and a second electrode and a thin film transistor (TFT) for controlling an operation of each of the OLEDs are formed; and a second substrate provided to face to and be spaced apart from the first substrate, the TFT further comprising; a gate electrode formed on the first substrate; an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer and the oxide semiconductor layer including a channel region, a source region, and a drain region; a source electrode and a drain electrode respectively electrically contacting the source region and the drain region; and the oxide semiconductor layer being formed of an IZO layer (indium zinc oxide layer) including Zr. - View Dependent Claims (12)
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Specification