SEMICONDUCTOR DEVICE USING ELEMENT ISOLATION REGION OF TRENCH ISOLATION STRUCTURE AND MANUFACTURING METHOD THEREOF
First Claim
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1. A manufacturing method of a semiconductor device comprising:
- forming a stacked film configuring a semiconductor device on a semiconductor substrate,patterning the stacked film by reactive ion etching to form an isolation trench that isolates elements and expose a surface of the semiconductor substrate at least a bottom portion of the isolation trench,filling an O3-TEOS series film exhibiting underlying material selectivity as a first filling dielectric film in the isolation trench to have a thick film thickness on the bottom portion of the isolation trench, andfilling the isolation trench with a second filling dielectric film to form an element-element isolation region.
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Abstract
A stacked film including a gate dielectric film and electrode film of each memory cell of a flash memory is formed on a semiconductor substrate. The stacked film is patterned by reactive ion etching to form an isolation trench for formation of an element isolation region and the surface of the semiconductor substrate is exposed to the internal portion of the isolation trench. An O3-TEOS film exhibiting underlying material selectivity during the deposition is formed in the isolation trench as the first filling dielectric film and then the isolation trench is filled with the second filling dielectric film to form an element isolation region of an STI structure.
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Citations
20 Claims
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1. A manufacturing method of a semiconductor device comprising:
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forming a stacked film configuring a semiconductor device on a semiconductor substrate, patterning the stacked film by reactive ion etching to form an isolation trench that isolates elements and expose a surface of the semiconductor substrate at least a bottom portion of the isolation trench, filling an O3-TEOS series film exhibiting underlying material selectivity as a first filling dielectric film in the isolation trench to have a thick film thickness on the bottom portion of the isolation trench, and filling the isolation trench with a second filling dielectric film to form an element-element isolation region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A semiconductor device comprising:
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an active area formed on a semiconductor substrate, and a shallow trench isolation portion having an isolation trench formed to separate the active area from an adjacent active area and a dielectric film filled in the isolation trench, wherein the dielectric film filled in the isolation trench is a stacked film having a first dielectric film formed of an O3-TEOS series film filled to have a thick film thickness on a bottom portion of the isolation trench and a second dielectric film formed on the first dielectric film. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A semiconductor device comprising:
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memory cells each having a gate dielectric film, charge storage layer, inter-polysilicon gate dielectric film and control gate stacked on a semiconductor substrate, an element isolation region of a trench isolation structure formed on the semiconductor substrate, the first dielectric films formed of O3-TEOS series films filled in portions on an active area between adjacent word lines without causing any seam, the second dielectric films filled on the first dielectric films in the portions between adjacent word lines, and the third dielectric films filled to surround upper portions of the element isolation region in the portions between adjacent word lines. - View Dependent Claims (18, 19, 20)
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Specification