Structure and Method for Forming Field Effect Transistor with Low Resistance Channel Region
First Claim
1. A trench-gate field effect transistor comprising:
- trenches extending into a silicon region of a first conductivity type;
a gate electrode in each trench;
body regions of second conductivity type extending over the silicon region between adjacent trenches, each body region forming a first PN junction with the silicon region, and each body region including a silicon-germanium layer of the second conductivity type laterally extending between adjacent trenches;
a gate dielectric layer lining at least upper sidewalls of each trench, the gate dielectric layer insulating the gate electrode from the body region;
source regions of the first conductivity flanking the trenches, each source region forming a second PN junction with one of the body regions; and
channel regions extending in the body regions along sidewalls of the trenches between the source regions and a bottom surface of the body regions, wherein the silicon-germanium layers extend into corresponding channel regions to thereby reduce the channel resistance.
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Abstract
A trench-gate field effect transistor includes trenches extending into a silicon region of a first conductivity type, and a gate electrodes in each trench. Body regions of second conductivity type extend over the silicon region between adjacent trenches. Each body region forms a first PN junction with the silicon region, and each body region includes a silicon-germanium layer of the second conductivity type laterally extending between adjacent trenches. Source regions of the first conductivity flank the trenches, and each source region forms a second PN junction with one of the body regions. Channel regions extend in the body regions along sidewalls of the trenches between the source regions and a bottom surface of the body regions. The silicon-germanium layers extend into corresponding channel regions to thereby reduce the channel resistance.
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Citations
24 Claims
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1. A trench-gate field effect transistor comprising:
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trenches extending into a silicon region of a first conductivity type; a gate electrode in each trench; body regions of second conductivity type extending over the silicon region between adjacent trenches, each body region forming a first PN junction with the silicon region, and each body region including a silicon-germanium layer of the second conductivity type laterally extending between adjacent trenches; a gate dielectric layer lining at least upper sidewalls of each trench, the gate dielectric layer insulating the gate electrode from the body region; source regions of the first conductivity flanking the trenches, each source region forming a second PN junction with one of the body regions; and channel regions extending in the body regions along sidewalls of the trenches between the source regions and a bottom surface of the body regions, wherein the silicon-germanium layers extend into corresponding channel regions to thereby reduce the channel resistance. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An N-channel trench-gate field effect transistor comprising:
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trenches extending into an N-type silicon region; a gate electrode in each trench; body regions of P-type conductivity extending over the silicon region between adjacent trenches, each body region including a lower silicon layer of P-type conductivity forming a first PN junction with the N-type silicon region, a silicon-germanium layer of P-type conductivity over the lower silicon layer, and an upper silicon layer of P-type conductivity over the silicon-germanium layer; and source regions of N-type conductivity type flanking the trenches, each source region forming a second PN junction with the upper silicon layer. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A trench-gate field effect transistor comprising:
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trenches extending into a silicon region of a first conductivity type; a gate electrode in each trench; body regions of a second conductivity type extending over the silicon region between adjacent trenches, each body region forming a PN junction with the silicon region; a gate dielectric layer lining at least upper sidewalls of each trench, the gate dielectric layer insulating the gate electrode from the body region; source regions of the first conductivity flanking the trenches; and a silicon-germanium region vertically extending through each source region and through a corresponding body region, the silicon-germanium region terminating within the corresponding body region before reaching the PN junction. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23)
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24-44. -44. (canceled)
Specification