Sampling and Readout of an Image Sensor Having a Sparse Color Filter Array Pattern

• US 20090195681A1
• Filed: 02/01/2008
• Published: 08/06/2009
• Est. Priority Date: 02/01/2008
• Status: Active Grant

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Compton, John T., Hamilton, John F. JR.
• Granted Patent: US 7,999,870 B2
• Time in Patent Office: Days
• US Class Current: 348/308
• CPC Class Codes: H04N 23/632 for displaying or modifying preview images prior to image capturing, e.g. variety of image resolutions or capturing parameters
• CPC Class Codes: H04N 23/667 Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
• CPC Class Codes: H04N 25/133 including elements passing panchromatic light, e.g. filters passing white light
• CPC Class Codes: H04N 25/135 based on four or more different wavelength filter elements
• CPC Class Codes: H04N 25/42 by switching between different modes of operation using different resolutions or aspect ratios, e.g. switching between interlaced and non-interlaced mode
• CPC Class Codes: H04N 25/443 by reading pixels from selected 2D regions of the array, e.g. for windowing or digital zooming
• CPC Class Codes: H04N 25/46 by combining or binning pixels
• CPC Class Codes: H04N 25/70 SSIS architectures; Circuits associated therewith
• CPC Class Codes: H04N 25/766 comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power
• CPC Class Codes: H04N 25/767 Horizontal readout lines, multiplexers or registers
• CPC Class Codes: H04N 25/778 comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself

Abstract

A CMOS image sensor or other type of image sensor comprises an array of pixels arranged in rows and columns, with the columns being separated into groups each comprising two or more columns that share a common output. The image sensor further comprises sampling and readout circuitry that includes, for each group of columns in the pixel array, a corresponding set of two or more column circuits. The sampling and readout circuitry is configured to sample the common output for each group of columns independently into one of the column circuits associated with that group, and to read out the common output for each group of columns as previously sampled into another of the column circuits associated with that group. The image sensor may be implemented in a digital camera or other type of image capture device.

Claims

1. An image sensor comprising:

an array of pixels arranged in rows and columns, the columns being separated into groups each comprising a plurality of the columns and sharing a common output; and

sampling and readout circuitry comprising, for each group of columns in the pixel array, a corresponding plurality of column circuits, the sampling and readout circuitry being configured to sample the common output for each group of columns independently into one of the plurality of column circuits associated with said group, and to read out the common output for each group of columns as previously sampled into another of the plurality of column circuits associated with said group.

2. The image sensor of claim 1 wherein said image sensor comprises a CMOS image sensor.

3. The image sensor of claim 1 wherein the plurality of column circuits for each group comprises a first column circuit arranged on a first side of the pixel array and a second column circuit arranged on a second side of the pixel array.

4. The image sensor of claim 1 wherein the plurality of column circuits for each group comprises first and second column circuits both arranged on one side of the pixel array.

5. The image sensor of claim 1 wherein the sampling and readout circuitry is configured to sample the common output for a given one of the groups of columns into one of the plurality of column circuits associated with the given group concurrently with reading out of the common output for the given group as previously sampled into another of the plurality of column circuits associated with the given group.

6. The image sensor of claim 1 wherein said pixel array is configured to provide controllable connection of one or more of the pixels in a given one of the groups of columns to the corresponding shared common output.

7. The image sensor of claim 1 wherein the pixel array is configured in accordance with sparse color filter array pattern.

8. The image sensor of claim 7 wherein the pixel array as configured in accordance with the sparse color filter array pattern has a minimal repeating unit including at least twelve pixels, the minimal repeating unit having a plurality of cells wherein each cell has a plurality of same-color pixels and a plurality of panchromatic pixels.

9. The image sensor of claim 8 wherein each of the cells comprises four pixels with the plurality of same-color pixels arranged diagonally relative to one another and the plurality of panchromatic pixels arranged diagonally relative to one another.

10. The image sensor of claim 9 wherein the minimal repeating unit comprises sixteen pixels arranged in four four-pixel cells as follows:

11. The image sensor of claim 10 wherein X, Y and Z are individually selected from red, green and blue.

12. The image sensor of claim 11 wherein X, Y and Z are red, green and blue, respectively.

13. The image sensor of claim 10 wherein X, Y and Z are individually selected from cyan, magenta and yellow.

14. The image sensor of claim 11 wherein X, Y and Z are cyan, magenta and yellow, respectively.

15. The image sensor of claim 7 wherein said sampling and readout circuitry is configured such that the color pixels in a given one of said cells are sampled and read out using different column circuits than the panchromatic pixels in the given cell.

16. The image sensor of claim 7 wherein said sampling and readout circuitry is configured such that panchromatic pixels in a given one of said rows are sampled into particular ones of the column circuits concurrently with color pixels in said row being read out from other ones of the column circuits.

17. The image sensor of claim 7 wherein same-color pixels in a given one of the cells are sampled together into the same column circuit associated with the group of columns that includes those same-color pixels.

18. The image sensor of claim 7 wherein said sampling and readout circuitry is configurable into a plurality of operating modes including one or more of the following:

a full resolution mode without binning of same-color pixels;

a full resolution mode with binning of same-color pixels;

a full resolution mode with binning of same-color pixels and double sampling;

a quarter-resolution mode with binning of panchromatic and same-color pixels;

a quarter-resolution mode with binning of panchromatic and same-color pixels and double sampling;

a quarter-resolution video mode without desaturation;

a quarter-resolution video mode with desaturation;

a quarter-resolution video mode with double sampling;

a fast autofocus mode with binning of panchromatic pixels; and

a fast autofocus mode with binning of color pixels.

19. A digital imaging device comprising:

an image sensor; and

one or more processing elements configured to process outputs of the image sensor to generate a digital image;

wherein said image sensor comprises;

an array of pixels arranged in rows and columns, the columns being separated into groups each comprising a plurality of the columns and sharing a common output; and

sampling and readout circuitry comprising, for each group of columns in the pixel array, a corresponding plurality of column circuits, the sampling and readout circuitry being configured to sample the common output for each group of columns independently into one of the plurality of column circuits associated with said group, and to read out the common output for each group of columns as previously sampled into another of the plurality of column circuits associated with said group.

20. The digital imaging device of claim 19 wherein said digital imaging device comprises a digital camera.