Memory Mapping Architecture

• US 20090198952A1
• Filed: 08/18/2008
• Published: 08/06/2009
• Est. Priority Date: 02/04/2008
• Status: Abandoned Application

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Khmelnitsky, Vadim, Wakrat, Nir Jacob
• Application Number:
  US12/193,563
• Publication Number:
  US 20090198952A1
• Time in Patent Office: Days
• US Class Current: 711/206
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0868 Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/1044 Space efficiency improvement
• CPC Class Codes: G06F 2212/466 Metadata, control data
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages

Abstract

Memory mapping techniques for non-volatile memory are disclosed where logical sectors are mapped into physical pages using data structures in volatile and non-volatile memory. In some implementations, a first lookup table in non-volatile memory maps logical sectors directly into physical pages. A second lookup table in volatile memory holds the physical address of the first lookup table in non-volatile memory. In some implementations, a cache in volatile memory holds the physical addresses of the most recently written logical sectors. Also disclosed is a block TOC describing block content which can be used for garbage collection and restore operations.

Claims

1. A method comprising:

obtaining a request to read or write to a logical sector corresponding to a data page in a first memory;

reading a first lookup table in a second memory to determine a location of a second lookup table in the first memory; and

reading the second lookup table to determine a mapping between the logical sector and the data page.

2. The method of claim 1, further comprising:

reading the first lookup table from non-volatile memory and the second lookup table from volatile memory.

3. The method of claim 2, further comprising:

determining a mapping between the logical sector and the data page; and

reading the data page from the non-volatile memory using the mapping.

4. The method of claim 2, further comprising:

determining a mapping between the logical sector and the data page; and

writing data to the data page using the mapping.

5. The method of claim 2, where the first lookup table is a table of contents and the second lookup table is an index table, where the index table of contents stores page addresses of index table entries and index table entries store data page addresses.

6. A memory system, comprising:

volatile memory storing a first lookup table;

non-volatile memory storing a second lookup table;

a controller coupled to the volatile memory and non-volatile memory and operable for obtaining a request to read or write to a logical sector;

reading the first lookup table from volatile memory to determine a location of a second lookup table in non-volatile memory; and

reading the second lookup table to determine a mapping between the logical sector and a data page in the non-volatile memory.

7. The system of claim 6, where the data page is stored on a different memory device than the lookup tables.

8. The system of claim 6, where the controller is operable for:

reading the data page from the non-volatile memory using the mapping.

9. The system of claim 6, where the controller is operable for:

writing data to the data page using the mapping.

10. The system of claim 6, where the first lookup table is a table of contents and the second lookup table is an index table, where the index table of contents stores page addresses of index table entries and index table entries store data page addresses.

11. The system of claim 6, where the data page is included in a block of the non-volatile memory and the block includes a block table of contents associating the data page with the logical sector.

12. The system of claim 11, where the block table of contents is stored in a last page of the block.

13. The system of claim 12, where the volatile memory includes a block table for storing at least a valid page count for the block.

14. The system of claim 6, further comprising:

an interface configurable for coupling to a host device, and for obtaining the read or write requests from the host device.

15. A computer-readable medium having instructions stored thereon, which, when executed by a processor, causes the processor to perform operations comprising:

creating an index table in non-volatile memory having entries for storing data page addresses; and

creating an index table of contents in volatile memory having entries for storing page addresses of corresponding entries of the index table.

16. The computer-readable medium of claim 15, further comprising:

obtaining a request to read or write to a logical sector corresponding to a data page in non-volatile memory;

reading the index table of contents to determine the page address of a corresponding index table entry storing the data page address;

reading the index table entry to obtain the data page address; and

performing a read or write operation on the data page using the data page address.