System and Method for Performing Dynamic Request Routing Based on Broadcast Queue Depths
First Claim
1. A processor chip, comprising:
- at least one processor;
a plurality of communication ports for coupling the processor chip to a plurality of other processor chips; and
heartbeat signal generation logic for generating a heartbeat signal for broadcasting over the plurality of communication ports to the plurality of other processor chips, wherein the heartbeat signal generation logic transmits queue depth information associated with the plurality of communication ports of the processor chip in the heartbeat signal broadcast over the plurality of communication ports to the plurality of other processor chips.
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Abstract
A system and method for performing dynamic request routing based on broadcast depth queue information are provided. Each processor chip in the system may use a synchronized heartbeat signal it generates to provide queue depth information to each of the other processor chips in the system. The queue depth information identifies a number of requests or amount of data in each of the queues of a processor chip that originated the heartbeat signal. The queue depth information from each of the processor chips in the system may be used by the processor chips in determining optimal routing paths for data from a source processor chip to a destination processor chip. As a result, the congestion of data for processing at each of the processor chips along each possible routing path may be taken into account when selecting to which processor chip to forward data.
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Citations
21 Claims
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1. A processor chip, comprising:
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at least one processor; a plurality of communication ports for coupling the processor chip to a plurality of other processor chips; and heartbeat signal generation logic for generating a heartbeat signal for broadcasting over the plurality of communication ports to the plurality of other processor chips, wherein the heartbeat signal generation logic transmits queue depth information associated with the plurality of communication ports of the processor chip in the heartbeat signal broadcast over the plurality of communication ports to the plurality of other processor chips. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method, in a data processing system, comprising:
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receiving, in a first processor chip of the data processing system, a plurality of first heartbeat signals from a plurality of second processor chips coupled to the first processor chip via one or more communication ports, wherein the plurality of first heartbeat signals have first queue depth information associated with respective processor chips of the plurality of second processor chips; storing the first queue depth information in a queue depth information data structure storage of the first processor chip; and performing routing of data from the first processor chip to a destination processor chip in the data processing system based on the first queue depth information stored in the queue depth information data structure storage. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. A computer program product comprising a computer useable medium having a computer readable program, wherein the computer readable program, when executed in a data processing system, causes the data processing system to:
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receive, in a first processor chip of the data processing system, a plurality of first heartbeat signals from a plurality of second processor chips coupled to the first processor chip via one or more communication ports, wherein the plurality of first heartbeat signals have first queue depth information associated with respective processor chips of the plurality of second processor chips; store the first queue depth information in a queue depth information data structure storage of the first processor chip; and perform routing of data from the first processor chip to a destination processor chip in the data processing system based on the first queue depth information stored in the queue depth information data structure storage.
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21. A system, comprising:
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a plurality of processor chips; and a plurality of communication links coupling each processor chip in the plurality of processor chips to at least one other processor chip in the plurality of processor chips, wherein each processor chip in the plurality of processor chips comprises heartbeat signal generation logic for generating a heartbeat signal for broadcasting over one or more communication links, in the plurality of communication links, coupled to the processor chip, wherein the heartbeat signal generation logic transmits queue depth information, associated with the one or more communication links, in the heartbeat signal broadcast over the one or more communication links to the plurality of other processor chips.
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Specification