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Microprocessor systems

  • US 20090198969A1
  • Filed: 01/31/2008
  • Published: 08/06/2009
  • Est. Priority Date: 01/31/2008
  • Status: Active Grant
First Claim
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1. A method of operating a microprocessor system that includes a plurality of functional units arranged in a pipelined fashion and in which at least one stage in the pipeline can process a thread for execution at the same time as other stages in the pipeline are processing other threads for execution, one or more of the functional units each including or having associated with it a cache memory for data to be used by the functional unit when processing a thread, the method comprising:

  • detecting whether the system is in a livelock state; and

    if a livelock state is detected, preventing one or more of the threads in the pipeline from being able to change the contents of one or more of the caches.

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