METHODS AND APPARATUS FOR A HIGH POWER FACTOR BALLAST HAVING HIGH EFFICIENCY DURING NORMAL OPERATION AND DURING DIMMING

• US 20090200953A1
• Filed: 11/24/2008
• Published: 08/13/2009
• Est. Priority Date: 02/08/2008
• Status: Abandoned Application

• Current Assignee: PureSpectrum Incorporated
• Original Assignee: PureSpectrum Incorporated
• Inventors: King, Ray James
• Application Number:
  US12/277,014
• Publication Number:
  US 20090200953A1
• Time in Patent Office: Days
• US Class Current: 315/209.R
• CPC Class Codes: H05B 41/28 using static converters
• CPC Class Codes: H05B 41/2986 against internal abnormal circuit conditions
• CPC Class Codes: H05B 41/3924 by phase control, e.g. using a triac H05B41/3922 takes precedence

Abstract

Methods and apparatus for powering a ballast that is dimmable and has a high power factor. The ballast circuit includes a rectifier, bypass capacitor, a driver circuit, and a resonant circuit that are configured to actuate a light source, such as a fluorescent lamp. Specifically, the bypass capacitor stores energy to produce a high frequency current which is introduced into the resonant circuit to continually recycle energy in the resonant circuit, resulting in a circuit with a high power factor. Further, because the current flowing into the resonant circuit is substantially sinusoidal, the circuit generally has an ideal crest factor, thereby increasing the lifespan of the light source.

Claims

1. A ballast circuit, comprising:

a rectifier connected to a first node and a second node, the rectifier configured to provide an output of unfiltered DC voltage varying at twice a line frequency, said DC voltage being rectified from an AC voltage power source alternating at said line frequency, wherein the first node is connected to a first terminal of a bypass capacitor and the second node is connected to a second terminal of the bypass capacitor, said bypass capacitor storing energy at a first frequency that exceeds the line frequency, wherein said bypass capacitor presents a high impedance to the unfiltered DC voltage at the line frequency;

a first switch connected to the first node operable to selectively couple the first node to a resonant circuit, the resonant circuit having a resonant frequency and configured to be connected to a light source, wherein the resonant circuit stores energy during a first portion of a cycle of the first frequency;

a second switch operable to selectively couple the resonant circuit to the second node, the second switch causing all or some of the energy stored in the resonant circuit to be recirculated into the resonant circuit during a second portion of the cycle of the first frequency.

2. The ballast circuit of claim 1 wherein the bypass capacitor is of a value so that the unfiltered DC voltage drops to less than 18 volts every half cycle of the line frequency.

3. The ballast circuit of claim 1 wherein the bypass capacitor is discharged every half cycle of the line frequency.

4. A ballast circuit as defined in claim 1, further comprising a driver circuit to alternately actuate one of the first and second switches at a switching frequency higher than the first frequency.

5. The ballast circuit of claim 1, wherein the resonant circuit comprises:

a first capacitor having a first terminal connected to the first and second switches;

an inductor having a first terminal connected to a second terminal of the first capacitor wherein said inductor is of a value to allow an unfiltered DC current at the line frequency and a second current at the first frequency to simultaneously flow through said inductor but not saturate said inductor;

a second capacitor having a first terminal connected to the second terminal of the inductor, the second terminal of the capacitor connected to the second node; and

a third capacitor having a first terminal and a second terminal, said first terminal and said second terminal configured to be connected to a first and second filament of the light source.

6. The ballast circuit of claim 5 wherein a value of the bypass capacitor is selected so as to cause the light source to ignite at each half cycle at the line frequency.

7. The ballast circuit of claim 5, wherein the resonant circuit configured to be connected to said light source is connected to said light source, wherein the inductor and the first capacitor are operable to simultaneously limit the flow of the unfiltered DC current at the line frequency and the second current provided to the light source.

8. The ballast circuit of claim 1, wherein the resonant circuit configured to be connected to said light source is connected to said light source, wherein a first terminal of the rectifier is connected to the light source via the resonant network during the first portion of the first frequency and a second terminal of the rectifier is connected to the light source via the resonant network during the second portion of the first frequency, wherein the light source is periodically not ionized for a time period at a rate corresponding to twice the period of the line frequency.

9. A ballast circuit of claim 1, wherein the resonant circuit configured to be connected to said light source is connected to said light source, and wherein the light source is not ionized when the AC voltage crosses zero volts.

10. A ballast circuit of claim 2, wherein the capacitor comprises a polypropylene capacitor having a capacitance value in the range of 25-100 nanofarads per watt of power of the light source to be connected to the resonant circuit when the household power is 120 v.

11. The ballast circuit of claim 10, wherein the second capacitor is a polypropylene capacitor having a value from 0.01 μ

F to 1 μ

F.

12. The ballast circuit of claim 1, wherein the ballast is integrated with a fluorescent bulb to form a compact fluorescent lamp (“

CFL”

).

13. The ballast circuit of claim 1 wherein said resonant circuit is configured to be connected to a tubular fluorescent bulb.

14. The ballast circuit of claim 1, wherein the resonant circuit is configured to match the impedance of the light source to the output of the unfiltered rectified DC voltage source.

15. The ballast circuit of claim 1 further comprising:

a voltage regulator circuit configured to provide a regulated DC input voltage to a driver circuit for actuating said first switch and said second switch, wherein said voltage regulator circuit is configured to provide the regulated DC input voltage to the driver when said AC voltage from said power source is processed by a dimmer.

16. A method of powering a ballast circuit, comprising:

charging energy in a non-electrolytic bypass capacitor connected to the outputs of a full wave bridge rectifier wherein the value of the bypass capacitor is such that the bypass capacitor is discharged every half cycle at a line frequency;

storing energy in the bypass capacitor to subsequently produce a high frequency current from the bypass capacitor, the bypass capacitor connected to a first node and a second node;

selectively coupling the bypass capacitor to a resonant circuit via the first node for a first time period, wherein coupling the resonant circuit to the first node results in a voltage at a light source, wherein said voltage at the light source is the result of the combination of a first current from an output of the full wave bridge rectifier at the line frequency, the high frequency current from the bypass capacitor, and a second current present in the resonant circuit; and

selectively coupling the resonant circuit to the second node for a second time period, wherein coupling the second node generates a negative voltage in the resonant circuit at the light source and allows energy from the full wave bridge rectifier to be stored in the bypass capacitor.

17. The method of claim 16, wherein the step of selectively coupling the bypass capacitor to a resonant circuit via the first node comprises coupling the resonant circuit to a first terminal of a rectifier wherein said rectifier produces an unfiltered DC voltage having a rectified sine wave shape at twice the line frequency.

18. The method of claim 17, wherein when an AC voltage at the input of the rectifier crosses a zero voltage point, said voltage at the light source is insufficient to ionize the bulb.

19. The method of claim 17 further comprising the step of:

adjusting a variable resistor connected to a driver circuit activating a first switch and a second switch to alter said first time period and said second time period.

20. A ballast circuit comprising:

a full wave bridge configured to receive AC voltage at a line frequency, said full wave bridge having a first node and a second node, said full wave bridge configured to provide an unfiltered DC voltage having a rectified AC voltage waveform at said first node, said full wave bridge configured to provide a first current at said line frequency;

a bypass capacitor comprising a non-electrolytic capacitor having a value of less than 3 μ

F, said bypass capacitor having a first terminal connected to said first node and second terminal connected to said second node, said bypass capacitor configured to provide a second current at a high frequency;

a driver circuit configured to periodically generate a first activation signal and a second activation signal;

a first solid state switch connected to receive said first activation signal, said first solid state switch having a first terminal connected to said first node and a second terminal connected to a third node, said first solid state switch configured to connect said first node to said third node when activated by said first activation signal thereby providing said first current and said second current to said third node;

a second solid state switch connected to receive said second activation signal, said second solid state switch having a first terminal connected to said third node and a second terminal connected to said second node; and

a resonant circuit comprising a first capacitor, an inductor, a second capacitor, and a third capacitor, wherein;

the first capacitor has a first terminal is connected to said third node, said first capacitor having a value of less than 0.2 μ

F;

the inductor has a first terminal connected to a second terminal of said first capacitor and has a second terminal connected to a first terminal of the second capacitor,

the second capacitor has a second terminal connected to the second node,

said second terminal of said inductor is configured to be connected to first terminal of a third capacitor via a first filament terminal of a first filament of a gas-discharge lamp,

said third capacitor having a second terminal is configured to be connected to a second filament terminal of the first filament of the gas-discharge lamp,

wherein said third capacitor is configured to be connected to a first filament terminal of a second filament of the gas discharge lamp and said second node is configured to be connected to a second filament terminal of the second filament of the gas-discharge lamp, and

wherein, said inductor is sized so as to not be saturated during a peak current flowing through said inductor, said peak current comprising the first current and the second current at the time when the output of the rectifier is at its highest output voltage.

21. The ballast circuit of claim 20 further comprising:

a housekeeping supply circuit connected to receive said unfiltered DC voltage at said first node, said housekeeping supply circuit configured to provide an input power to said driver circuit.

22. The ballast circuit of claim 21 wherein the housekeeping supply circuit comprises:

a resistor having a first terminal connected to the first node, and a second terminal; and

a housekeeping filter capacitor having a first terminal connected to said second terminal of the resistor and a second terminal connected to the second node, wherein said first terminal provides input power to said driver circuit.

23. The ballast circuit of claim 21 wherein said housekeeping circuit comprises:

a first resistor having a first terminal connected to said first node and a second terminal;

a first transistor having a first terminal and a second terminal, said first terminal connected to the second terminal of the first resistor, said second terminal of the first transistor connected to a fourth node;

a diode having an anode counted to the fourth node providing said regulated output voltage and a cathode connected to a first terminal of a fourth capacitor, said fourth capacitor having a second terminal connected to said second node; and

a zener diode having a cathode connected to said fourth node and an anode connected said second node via a second resistor.

24. The ballast circuit of claim 21 further comprising:

said gas-discharge lamp, wherein said gas-discharge lamp comprises a fluorescent lamp.

25. The ballast circuit of claim 21 wherein said ballast is configured to operate with said gas-discharge lamp comprising at least one tubular fluorescent lamp.

26. The ballast circuit of claim 21 wherein said inductor has a value between 0.23 and 2.1 mH for a lamp output rated at less than 42 watts.

27. The ballast circuit of claim 24 wherein said gas discharge lamp is periodically not ionized during each half cycle.

28. A method of operating a ballast to generate light from a fluorescent bulb comprising the steps of:

selectively switching at a switching frequency by a first solid state switch a rectified AC voltage at a line frequency thereby providing a plurality of switched DC voltages to a resonant circuit;

producing a plurality of alternating bulb voltages by said resonant circuit to said fluorescent bulb wherein;

a first portion of said plurality of alternating bulb voltages increase in magnitude of voltage for a first time period during which said fluorescent bulb is not ionized,

a second portion of said plurality of alternating bulb voltages remain constant in magnitude of voltage for a second time period due to ionization occurring in said fluorescent bulb,

a third portion of said plurality of alternating bulb voltages decrease in magnitude of voltage for a third time period during which said fluorescent bulb is not ionized, and

wherein said first time period, said second time period, and said third time period occur during a half cycle of said line frequency.