Data signal handling circuitry and methods with error analysis capabilities

• US 20090204860A1
• Filed: 08/25/2008
• Published: 08/13/2009
• Est. Priority Date: 02/13/2008
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Yao, Wei, Gettemy, Shawn Robert, Corlett, Barry
• Granted Patent: US 8,418,046 B2
• Time in Patent Office: Days
• US Class Current: 714/724
• CPC Class Codes: G09G 5/00 Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators image data processing or generation, in general G06T
• CPC Class Codes: H03K 19/0027 in field effect transistor circuits

Abstract

To help identify a noise (interference) source in an electronic device that may be causing data errors in the device, relatively low level data receiver circuitry in the device is provided with one or more error signal output leads. An error signal on such a lead includes an error indication as soon as possible after the associated low level circuitry detects a data error. The timing of such an error indication is compared to the timing of noise from various possible noise sources in the device. The noise source that produced significant noise closest in time prior to the error indication may be identified as the noise source that was probably responsible for the data error that caused the error indication.

Claims

1. An electronic device comprising:

a component that receives a data signal and that processes data from that signal through a series of circuit layers, beginning with a relatively low level circuit layer that initially receives the data signal, and ending with a relatively high level circuit layer that performs an application on data from the data signal, the relatively low level circuit layer outputting from the component an error signal containing an error indication substantially concurrent with the relatively low level circuit layer detecting a data error in the data signal.

2. The electronic device defined in the claim 1 further comprising:

a lead conveying a noise signal containing noise indications substantially concurrent with noise produced by a noise source of the electronic device.

3. The electronic device defined in claim 2 further comprising:

processor circuitry for receiving the error signal and the noise signal, and for comparing timing of an error indication in the error signal and a noise indication in the noise signal.

4. The electronic device defined in claim 3 wherein the processor circuitry produces an output signal identifying the noise source as a possible cause of the error indication if the error indication has a predetermined timing relationship to the noise indication.

5. The electronic device defined in claim 4 wherein the predetermined relationship requires the noise indication to be no more than a predetermined amount of time prior to the error indication.

6. The electronic device defined in claim 2 further comprising:

a first device output terminal to which the error signal is applied; and

a second device output terminal to which the lead is connected.

7. Apparatus comprising the electronic device defined in claim 6 and circuitry external to the device for receiving the error signal from the first terminal and the noise signal from the second terminal.

8. The apparatus defined in claim 7 wherein the circuitry external to the device is adapted to display the error signal and the noise signal plotted against a common time base.

9. The apparatus defined in claim 7 wherein the circuitry external to the device is adapted to compare timing of an error indication in the error signal and a noise indication in the noise signal.

10. The electronic device defined in claim 1 further comprising:

a plurality of leads, each conveying a respective one of a plurality of noise signals, each of the noise signals containing noise indications substantially concurrent with noise produced by a respective one of a plurality of noise sources.

11. The electronic device defined in claim 10 further comprising:

processor circuitry for receiving the error signal and the noise signals, and for comparing timing of an error indication in the error signal and noise indications in the noise signals.

12. The electronic device defined in claim 11 wherein the processor circuitry produces an output signal identifying, as a possible cause of the error indication, a one of the noise sources for which the noise signal contained a noise indication having a predetermined timing relationship to the error indication.

13. The electronic device defined in claim 12 wherein the predetermined relationship requires the noise indication to be no more than a predetermined amount of time prior to the error indication.

14. The electronic device defined in claim 10 further comprising:

a first device output terminal to which the error signal is applied; and

a plurality of second device output terminals to which the leads are respectively connected.

15. Apparatus comprising the electronic device defined in claim 14 and circuitry external to the device for receiving the error signal from the first terminal and the plurality of noise signals from the plurality of second device terminals.

16. The apparatus defined in claim 15 wherein the circuitry external to the device is adapted to display the error signal and the plurality of noise signals plotted against a common time base.

17. The apparatus defined in claim 15 wherein the apparatus external to the device is adapted to compare timing of an error indication in the error signal and noise indications in the plurality of noise signals.

18. The electronic device defined in claim 1 wherein the relatively low level circuit layer is physical layer circuitry.

19. The electronic device defined in claim 18 wherein the circuit layers additionally include on intermediate level circuit layer that is intermediate the relatively low level circuit layer and the relatively high level circuit layer, and wherein the intermediate level circuit layer outputs from the component a second error signal containing an error indication substantially concurrent with the intermediate level circuit layer detecting a data error in the data signal.

20. The electronic device defined in claim 19 further comprising:

a lead conveying a noise signal containing noise indications substantially concurrent with noise produced by a noise source of the electronic device; and

processor circuitry for receiving the error signal, the second error signal, and the noise signal, and for comparing timing of an error indication in either of the error signal or the second error signal and a noise indication in the noise signal.

21. The electronic device defined in claim 1 wherein the component comprises a display of the electronic device.

22. A method of testing an electronic device including a component that receives a data signal and that processes data from that signal through a series of circuit layers, beginning with a relatively low level circuit layer that initially receives the data signal, and ending with a relatively high level circuit layer that performs an application on data from the data signal, the method comprising:

causing the relatively low level circuit layer to output from the component an error signal containing an error indication substantially concurrent with the relatively low level circuit layer detecting a data error in the data signal; and

comparing timing of the error indication in the error signal and a noise indication in a noise signal, the noise signal containing noise indications substantially concurrent with noise produced by a noise source of the electronic device.

23. The method defined in claim 22 wherein the comparing comprises:

determining whether the noise indication is within a predetermined time interval prior to the error indication.

24. The method defined in claim 22 wherein the comparing comprises:

further comparing timing of the error indication in the error signal and noise indications in each of a plurality of noise signals, each of the plurality of noise signals containing noise indications substantially concurrent with noise produced by a respective one of a plurality of noise sources of the electronic device.

25. The method defined in claim 24 wherein the further comparing comprises:

determining whether the noise indication in any of the noise signals is within a predetermined time interval prior to the error indication, and if so, identifying the noise source for that noise signal as a possible cause of the error indication.

26. The method defined in claim 22 wherein the causing comprises outputting the error signal from physical layer circuitry of the component.