Oxide semiconductor transistor and method of manufacturing the same

• US 20090206332A1
• Filed: 02/02/2009
• Published: 08/20/2009
• Est. Priority Date: 02/01/2008
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Kyung-Bae, Son, Kyoung-Seok, Kwon, Jang-Yeon, Jung, Ji-Sim, Lee, Sang-Yoon, Ryu, Myung-Kwan, Yoo, Byung-Wook, Kim, Tae-Sang
• Granted Patent: US 8,586,979 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An oxide semiconductor thin film transistor (TFT) and a method of manufacturing the oxide semiconductor TFT. The oxide semiconductor TFT includes a first gate insulating layer arranged between an oxide semiconductor channel layer and a first gate and a second gate insulating layer arranged between the channel layer and a second gate. The first and second gate insulating layers are made out of different materials and have different thicknesses. Preferably, the second gate insulating layer is silicon oxide and is thinner than the first gate insulating layer which is preferably silicon nitride. Oxide semiconductor refers to an oxide material such as Zinc Oxide, Tin Oxide, Ga—In—Zn Oxide, In—Zn Oxide, In—Sn Oxide, and one of Zinc Oxide, Tin Oxide, Ga—In—Zn Oxide, In—Zn Oxide and In—Sn Oxide.

Claims

1. An oxide semiconductor thin film transistor (TFT), comprising:

a channel layer including an oxide semiconductor;

a first gate;

a second gate;

a first gate insulating layer arranged between the channel layer and the first gate; and

a second gate insulating layer arranged between the channel layer and the second gate, wherein the first and second gate insulating layers are comprised of different materials.

2. The oxide semiconductor TFT of claim 1, wherein the first gate insulating layer is comprised of a material that is absent of oxygen, and the second gate insulating layer is comprised a material that includes oxygen.

3. The oxide semiconductor TFT of claim 2, wherein the first gate insulating layer is comprised of silicon nitride, and the second gate insulating layer is comprised of silicon oxide.

4. The oxide semiconductor TFT of claim 2, wherein the first and second gate insulating layers have different thicknesses.

5. The oxide semiconductor TFT of claim 4, wherein the first gate insulating layer is thicker than the second gate insulating layer.

6. The oxide semiconductor TFT of claim 5, wherein a thickness of the first gate insulating layer is in the range of 2000 Å

to 1 μ

m, and a thickness of the second gate insulating layer is in the range of 500 Å

to 5000 Å

.

7. The oxide semiconductor TFT of claim 1, further comprising source and drain electrodes arranged at opposite sides of an upper surface of the channel layer.

8. The oxide semiconductor TFT of claim 1, further comprising source and drain electrodes arranged at opposite sides of a lower surface of the channel layer.

9. The oxide semiconductor TFT of claim 1, wherein the second gate is electrically connected to the first gate.

10. The oxide semiconductor TFT of claim 1, wherein the second gate is electrically connected to an independent line that electrically insulated from the first gate.

11. The oxide semiconductor TFT of claim 1, wherein the oxide semiconductor is a material selected from a group consisting of Zinc Oxide, Tin Oxide, Ga—

In—

Zn Oxide, In—

Zn Oxide, In—

Sn Oxide, and one of Zinc Oxide, Tin Oxide, Ga—

In—

Zn Oxide, In—

Zn Oxide, and In—

Sn Oxide that are doped with one of Al, Ni, Cu, Ta, Mo, Hf, and Ti.

12. An oxide semiconductor TFT, comprising:

a channel layer including an oxide semiconductor;

a first gate;

a second gate,

a first gate insulating layer arranged between the channel layer and the first gate; and

a second gate insulating layer arranged between the channel layer and the second gate, wherein the first and second gate insulating layers have different thicknesses.

13. The oxide semiconductor TFT of claim 12, wherein the first gate insulating layer is thicker than the second gate insulating layer.

14. The oxide semiconductor TFT of claim 13, wherein a thickness of the first gate insulating layer is in the range of 2000 Å

to 1 μ

m, and a thickness of the second gate insulating layer is in the range of 500 Å

to 5000 Å

.

15. The oxide semiconductor TFT of claim 13, wherein the first and second gate insulating layers are comprised of different materials.

16. The oxide semiconductor TFT of claim 15, wherein the first gate insulating layer is comprised of a material that is absent of oxygen, and the second gate insulating layer is comprised of a material that includes oxygen.

17. The oxide semiconductor TFT of claim 16, wherein the first gate insulating layer is comprised of silicon nitride, and the second gate insulating layer is comprised of silicon oxide.

18. The oxide semiconductor TFT of claim 12, further comprising source and drain electrodes arranged at opposite sides of an upper surface of the channel layer.

19. The oxide semiconductor TFT of claim 12, further comprising source and drain electrodes arranged at opposite sides of a lower surface of the channel layer.

20. The oxide semiconductor TFT of claim 12, wherein the second gate is electrically connected to the first gate.

21. The oxide semiconductor TFT of claim 12, wherein the second gate is electrically connected to an independent line that is electrically insulated from the first gate.

22. The oxide semiconductor TFT of claim 12, wherein the oxide semiconductor is a material selected from a group consisting of Zinc Oxide, Tin Oxide, Ga—

In—

Zn Oxide, In—

Zn Oxide, In—

Sn Oxide, and one of Zinc Oxide, Tin Oxide, Ga—

In—

Zn Oxide, In—

Zn Oxide, and In—

Sn Oxide that are doped with one of Al, Ni, Cu, Ta, Mo, Hf, and Ti.

23. A method of manufacturing an oxide semiconductor TFT, comprising:

forming sequentially a first gate and a first gate insulating layer on a substrate;

forming a channel layer comprised of an oxide semiconductor on the first gate insulating layer;

forming a second gate insulating layer that covers the channel layer; and

forming a second gate on the second gate insulating layer.

24. The method of claim 23, wherein the first and second gate insulating layers are comprised of different materials.

25. The method of claim 24, wherein the first gate insulating layer is comprised of a material that is absent of any oxygen, and the second gate insulating layer is comprised of a material that includes oxygen.

26. The method of claim 25, wherein the first gate insulating layer is comprised of silicon nitride, and the second gate insulating layer is comprised of silicon oxide.

27. The method of claim 25, wherein the first and second gate insulating layers have different thicknesses.

28. The method of claim 27, wherein the first gate insulating layer is thicker than the second gate insulating layer.

29. The method of claim 28 wherein the first gate insulating layer has a thickness in the range of 2000 Å

to 1 μ

m, and the second gate insulating layer has a thickness in the range of 500 Å

to 5000 Å

.

30. The method of claim 23, further comprising forming source and drain electrodes at opposite sides of an upper surface of the channel layer after the formation of the channel layer.

31. The method of claim 23, further comprising forming source and drain electrodes on the first gate insulating layer before the formation of the channel layer.

32. The method of claim 23, further comprising supplying oxygen into an upper portion of the channel layer by performing a plasma process that includes oxygen ions.

33. The method of claim 23, wherein the second gate is electrically connected to the first gate.

34. The method of claim 23, wherein the second gate is electrically connected to an independent line that is electrically insulated from the first gate.

35. The method of claim 23, wherein the oxide semiconductor is comprised of a material selected from a group consisting of Zinc Oxide, Tin Oxide, Ga—

In—

Zn Oxide, In—

Zn Oxide, In—

Sn Oxide, and one of Zinc Oxide, Tin Oxide, Ga—

In—

Zn Oxide, In—

Zn Oxide and In—

Sn Oxide that are doped with one of Al, Ni, Cu, Ta, Mo, Hf, and Ti.