GENERATING DRIVE SIGNALS FOR A SYNCHRONOUS RECTIFICATION SWITCH OF A FLYBACK CONVERTER

• US 20090207637A1
• Filed: 05/25/2007
• Published: 08/20/2009
• Est. Priority Date: 05/29/2006
• Status: Active Grant

• Current Assignee: Philips Lighting Holding BV (Signify N.V.)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Boeke, Ulrich
• Granted Patent: US 8,279,637 B2
• Time in Patent Office: Days
• US Class Current: 363/21.140
• CPC Class Codes: H02M 3/33592 having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

In order to further develop a circuit arrangement (100) as well as a method for generating at least one drive signal for at least one synchronous rectification switch of at least one flyback converter in such way that an improved and simpler thermal management can be combined with a significant cost reduction as well as with a higher efficiency, it is proposed to generate the drive signal for said synchronous rectification switch as a function of at least one oscillating signal controlling the synchronous rectification switch, of at least one constant delay time, of at least one variable delay time, and of at least one Boolean OR function.

Claims

1. A circuit arrangement (100) comprising at least one flyback converter, in particular at least one actively clamped bidirectional flyback converter, with

a first power semiconductor (Q1),

a second power semiconductor (Q2),

a third power semiconductor (Q3),

a fourth power semiconductor (Q4),

wherein the first power semiconductor (Q1) and the third power semiconductor (Q3) are arranged on the primary side of a transformer unit (Tr1), and the second power semiconductor (Q2) and the fourth power semiconductor (Q4) are arranged on the secondary side of the transformer unit (Tr1),

characterized in that the second power semiconductor (Q2) acts as synchronous rectification switch, and

the drive signal for said synchronous rectification switch is generated as a function of an oscillating signal controlling the synchronous rectification switch.

2. The circuit arrangement according to claim 1, characterized by a voltage sensor unit (VS) for measuring the voltage, in particular the voltage drop, of the first power semiconductor (Q1).

3. The circuit arrangement according to claim 2, characterized in that said voltage sensor unit (VS) generates at least one logic output signal (VI1)

being “

1”

or “

high”

if said voltage sensor unit (VS) measures a negative drain-source voltage of the first power semiconductor (Q1), and

being “

0”

or “

low”

if said voltage sensor unit (VS) measures a vanishing or positive drain-source voltage of the first power semiconductor (Q1).

4. The circuit arrangement according to claim 3, characterized in that

the logic output signal (VI1) from the voltage sensor unit (VS) and at least one delayed time signal (VPWM.Q2) are the input signals for the logic unit (L5), and

the output signal (VGS.Q2) of said logic unit (L5) acts as a drive signal to turn-on and to turn-off the second power semiconductor (Q2).

5. The circuit arrangement according to at least claim 1, characterized in that the second power semiconductor (Q2) is turned-on and/or turned-off with at least one variable delay time, with the delay time interval being a function of the relative power level of the flyback converter.

6. The circuit arrangement according to claim 5, characterized in that a minimum delay time is adjusted with at least one resistor unit (R2) in at least one time delay circuit (TDC), said delay time being in the order of some percentage of the time period (t7=1/fs) wherein fs is the switching frequency.

7. The circuit arrangement according to claim 1, characterized by

a first integrated circuit (IC1) assigned to said voltage sensor unit (VS);

a second integrated circuit (IC2) assigned to said time delay circuit (TDC);

a third integrated circuit (IC3) for providing positive quadruple 2-input AND function, said third integrated circuit (IC3) being arranged between said first integrated circuit (IC 1) and said time delay circuit (TDC) as well as behind said time delay circuit (TDC);

a fourth integrated circuit (IC4) arranged behind said third integrated circuit (IC3);

a fifth integrated circuit (IC5) arranged on the secondary side of the transformer unit (Tr1);

a sixth integrated circuit (IC6) arranged at the output stage of the circuit arrangement (100); and

/or

a seventh integrated circuit (IC7) arranged behind at least one eighth integrated circuit (IC8).

9. The method according to claim 7, characterized in that at least part of the flyback converter is turned-on and/or turned-off with at least one variable delay time, with the delay time interval being a function of the relative power level of the flyback converter.

8. A method for generating at least one drive signal for at least one synchronous rectification switch of at least one flyback converter, in particular at least one actively clamped bidirectional flyback converter,

characterized in that the drive signal for said synchronous rectification switch is generated as a function of at least one oscillating signal controlling the synchronous rectification switch.