THIN-FILM TRANSISTOR AND DISPLAY DEVICE
First Claim
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1. A thin-film transistor comprising:
- a gate electrode;
a gate insulating layer over the gate electrode;
a pair of conductive layers over the gate insulating layer, wherein the pair of conductive layers overlaps the gate electrode at least partly and is disposed with a space therebetween in a channel length direction;
a pair of impurity semiconductor layers over the pair of conductive layers and the gate electrode, wherein an impurity element imparting one conductivity type is added to the pair of impurity semiconductor layers to form a source region and a drain region; and
an amorphous semiconductor layer over the pair of conductive layers, wherein the amorphous semiconductor layer is in contact with at least a part of the gate insulating layer, which is between the pair of conductive layers, and disposed between the pair of impurity semiconductor layers and the pair of conductive layers.
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Abstract
A thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions so as to be overlapped at least partly with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of conductive layers which is overlapped over the gate insulating layers at least partly with the gate electrode and the impurity semiconductor layers, and is disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer which is in contact with the gate insulating layer and the pair of conductive layers and is extended between the pair of conductive layers.
27 Citations
25 Claims
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1. A thin-film transistor comprising:
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a gate electrode; a gate insulating layer over the gate electrode; a pair of conductive layers over the gate insulating layer, wherein the pair of conductive layers overlaps the gate electrode at least partly and is disposed with a space therebetween in a channel length direction; a pair of impurity semiconductor layers over the pair of conductive layers and the gate electrode, wherein an impurity element imparting one conductivity type is added to the pair of impurity semiconductor layers to form a source region and a drain region; and an amorphous semiconductor layer over the pair of conductive layers, wherein the amorphous semiconductor layer is in contact with at least a part of the gate insulating layer, which is between the pair of conductive layers, and disposed between the pair of impurity semiconductor layers and the pair of conductive layers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A thin-film transistor comprising:
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a gate electrode; a gate insulating layer over the gate electrode; a pair of conductive layers over the gate insulating layer, wherein the pair of conductive layers overlaps the gate electrode at least partly and is disposed with a space therebetween in a channel length direction; a pair of buffer layers over the pair of the conductive layers; a pair of impurity semiconductor layers over the pair of conductive layers and the gate electrode, wherein an impurity element imparting one conductivity type is added to the pair of impurity semiconductor layers to form a source region and a drain region; and an amorphous semiconductor layer over the pair of conductive layers, wherein the amorphous semiconductor layer is in contact with at least a part of the gate insulating layer, which is between the pair of conductive layers, and disposed between the pair of impurity semiconductor layers and the pair of conductive layers. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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18. A thin-film transistor comprising:
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a gate electrode; a gate insulating layer over the gate electrode; a pair of conductive layers over the gate insulating layer, wherein the pair of conductive layers overlaps the gate electrode at least partly and is disposed with a space therebetween in a channel length direction; a pair of impurity semiconductor layers over the pair of conductive layers and the gate electrode, wherein an impurity element imparting one conductivity type is added to the pair of impurity semiconductor layers to form a source region and a drain region; and an amorphous semiconductor layer over the pair of conductive layers, wherein the amorphous semiconductor layer is in contact with at least a part of the gate insulating layer, which is between the pair of conductive layers, and disposed between the pair of impurity semiconductor layers and the pair of conductive layers, wherein a space of the pair of impurity semiconductor layers is larger than the space of the pair of conductive layers. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsGODO, Hiromichi, DAIRIKI, Koji, KUROKAWA, Yoshiyuki, KAWAE, Daisuke, KOBAYASHI, Satoshi, MIYAIRI, Hidekazu, YAMAZAKI, Shunpei
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Granted Patent
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Time in Patent OfficeDays
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Field of Search
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US Class Current257/72
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CPC Class CodesH01L 27/1214 comprising a plurality of T...H01L 27/1288 employing particular maskin...H01L 29/04 characterised by their crys...H01L 29/458 for thin film silicon, e.g....H01L 29/4908 for thin film semiconductor...H01L 29/66765 Lateral single gate single ...
