SEMICONDUCTOR DEVICE

• US 20090218676A1
• Filed: 02/25/2009
• Published: 09/03/2009
• Est. Priority Date: 02/29/2008
• Status: Abandoned Application

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: MUTO, Kuniharu, TAKAHASHI, Hiroyuki, DANNO, Tadatoshi
• Application Number:
  US12/393,031
• Publication Number:
  US 20090218676A1
• Time in Patent Office: Days
• US Class Current: 257/693
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05556 in side view
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/29101 the principal constituent melting at a temperature of less than 400°C
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/37124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/40091 Arched
• CPC Class Codes: H01L 2224/40139 with an intermediate bond, e.g. continuous strap daisy chain
• CPC Class Codes: H01L 2224/40245 the item being metallic
• CPC Class Codes: H01L 2224/40247 Connecting the strap to a bond pad of the item
• CPC Class Codes: H01L 2224/45014 Ribbon connectors, e.g. rectangular cross-section
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 : the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/48624 : Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48699 : Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
• CPC Class Codes: H01L 2224/48724 : Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/49111 : the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/49113 : the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
• CPC Class Codes: H01L 2224/49171 : Fan-out arrangements
• CPC Class Codes: H01L 2224/73219 : Layer and TAB connectors
• CPC Class Codes: H01L 2224/73221 : Strap and wire connectors
• CPC Class Codes: H01L 2224/73263 : Layer and strap connectors
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 2224/8385 : using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 2224/84205 : Ultrasonic bonding
• CPC Class Codes: H01L 2224/85207 : Thermosonic bonding
• CPC Class Codes: H01L 2224/92247 : the second connecting process involving a wire connector
• CPC Class Codes: H01L 23/49513 : having bonding material between chip and die pad
• CPC Class Codes: H01L 23/49524 : the additional leads being a tape carrier or flat leads
• CPC Class Codes: H01L 23/49562 : for devices being provided for in H01L29/00
• CPC Class Codes: H01L 23/49575 : Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/06 : of a plurality of bonding areas
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/37 : of an individual strap connector
• CPC Class Codes: H01L 24/40 : of an individual strap connector
• CPC Class Codes: H01L 24/41 : of a plurality of strap connectors
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/84 : using a strap connector
• CPC Class Codes: H01L 24/91 : Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01026 : Iron [Fe]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/10157 : at the active surface
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/206 : Length ranges
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

A small-sized surface mount package having a low on-resistance is achieved, in which a power MOSFET etc. is sealed. In one side a molding resin, two silicon chips are sealed. On one side of the molding resin, three source leads and one gate lead are arranged. The three source leads are joined each other inside the molding resin, and the joined portion and a source pad of the silicon chip are electrically coupled each other via two Al ribbons. Moreover, a gate pad of the silicon chip is electrically coupled to the gate lead via one Au wire.

Claims

1. A semiconductor device in which a first semiconductor chip mounted over a first die pad portion and a second semiconductor chip mounted over a second die pad portion are sealed in a resin package, and outer lead portions of a plurality of leads are exposed from a side surface of the resin package;

wherein on a main surface of each of the first and second semiconductor chips, there are formed a power MOSFET, a gate pad coupled to a gate electrode of the power MOSFET, and a source pad coupled to a source of the power MOSFET and having an area larger than that of the gate pad;

wherein on a rear surface of each of the first and second semiconductor chips, a drain electrode of the power MOSFET is formed;

wherein between the rear surface of the first semiconductor chip and the first die pad portion, and between the rear surface of the second semiconductor chip and the second die pad portion, Ag pastes are intervened, respectively;

wherein the leads include a first gate lead electrically coupled to the gate pad of the first semiconductor chip, a first source lead electrically coupled to the source pad of the first semiconductor chip, a second gate lead electrically coupled to the gate pad of the second semiconductor chip, and a second source lead electrically coupled to the source pad of the second semiconductor chip; and

wherein at least the source pad of the first semiconductor chip and the first source lead are electrically coupled each other by a metal ribbon.

2. The semiconductor device according to claim 1,

wherein the source pad of the second semiconductor chip and the second source lead are electrically coupled each other by a metal wire.

3. The semiconductor device according to claim 1,

wherein an elastic modulus of the Ag paste is within a range of 0.2 to 5.3 GPa, and a shearing strength thereof is 8.5 MPa or more.

4. The semiconductor device according to claim 1,

wherein the first gate lead and the second source lead are exposed from a first side surface of the resin package, and the second gate lead and the second source lead are exposed from a second side surface of the resin package.

5. The semiconductor device according to claim 1,

wherein on a surface of each of the first and second die pad portions, the first and second gate leads, and the first and second source leads, a plated layer containing Pd as a principal component is formed.

6. The semiconductor device according to claim 1,

wherein a rear surface of each of the first and second die pad portions is exposed from the resin package.

7. The semiconductor device according to claim 1,

wherein a DC-DC converter is constituted by a power MOSFET formed over the main surface of the first semiconductor chip and a power MOSFET formed on the main surface of the second semiconductor chip.

8. The semiconductor device according to claim 1,

wherein a part of the first die pad portion is integrally formed with a first drain lead extending near the second die pad portion, and the source pad of the second semiconductor chip and the first drain lead are electrically coupled each other by a metal wire or a metal ribbon.

9. The semiconductor device according to claim 8,

wherein inside the resin package, the first drain lead is bent-formed so as to separate from a bottom surface of the resin package.

10. The semiconductor device according to claim 1,

wherein the source pad of the first semiconductor chip and the first source lead are electrically coupled each other by a plurality of the metal ribbons.

11. A semiconductor device in which a semiconductor chip mounted on a die pad portion is sealed in a resin package, and outer lead portions of a plurality of leads are exposed from a side surface of the resin package;

wherein on a main surface of the semiconductor chip, there are formed a power MOSFET, a gate pad coupled to a gate electrode of the power MOSFET, and a plurality of source pads coupled to a source of the power MOSFET and having an area larger than that of the gate pad;

wherein on a rear surface of the semiconductor chip, a drain electrode of the power MOSFET is formed;

wherein between the rear surface of semiconductor chip and the die pad portion, an Ag paste is intervened;

wherein the leads include a gate lead electrically coupled to the gate pad of semiconductor chip and a source lead electrically coupled to the source pad of semiconductor chip;

wherein, each of the source pads and the source lead are electrically coupled each other by a metal ribbon; and

wherein, the gate pad is arranged among the source pads.

12. The semiconductor device according to claim 11,

wherein the gate pad and the gate lead are electrically coupled each other by a metal wire.

13. The semiconductor device according to claim 11,

wherein an elastic modulus of the Ag paste is within a range of 0.2 to 5.3 GPa, and a shearing strength thereof is 8.5 MPa or more.

14. The semiconductor device according to claim 11,

wherein the gate lead and the source lead are exposed from a first side surface of the resin package, and a drain lead integrally formed with the die pad portion is exposed from a second side surface of the resin package.

15. The semiconductor device according to claim 11,

wherein on a surface of each of the die pad portion, the gate lead and the source lead, a plated layer containing Pd as a principal component is formed.

16. The semiconductor device according to claim 15,

wherein in a part of the plated layer formed on the surface of the die pad portion, notched portions for aligning the semiconductor chip when mounting it over the die pad portion are provided.

17. The semiconductor device according to claim 15,

wherein in a part of the plated layer formed on the surface of the die pad portion, notched portions for aligning the metal ribbon when bonding it onto the die pad portion are provided.