IMAGE PROCESSING APPARATUS, IMAGE PROCESSING SYSTEM AND IMAGE PROCESSING METHOD

• US 20090219444A1
• Filed: 02/02/2009
• Published: 09/03/2009
• Est. Priority Date: 08/02/2006
• Status: Abandoned Application

• Current Assignee: Glory AZ System Co. Ltd. (Glory Limited)
• Original Assignee: Glory Fsm Ltd., Steradian, Inc.
• Inventors: Kushida, Takashi, NOTSU, Risei, Yuzaki, Shin
• Application Number:
  US12/364,205
• Publication Number:
  US 20090219444A1
• Time in Patent Office: Days
• US Class Current: 348/699
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining

Abstract

An image processing apparatus according to the present invention includes a vector processor which performs vector processing on image data, and a scalar processor which performs scalar processing on the image data having undergone the vector processing.

Claims

1. An image processing apparatus for performing image processing including at least vector processing, comprising:

a vector processor which performs the vector processing on image data; and

a scalar processor which performs, if the image processing includes scalar processing in addition to the vector processing, the scalar processing on the image data having undergone the vector processing,

wherein the vector processing includes a process of decreasing a resolution of image data, and

the scalar processing includes a process of specifying a color gamut of each pixel in image data.

2. The image processing apparatus according to claim 1, wherein

the vector processor receives an instruction concerning the image processing, supplies the image data having undergone the vector processing to the scalar processor if the vector processor determines that the image processing includes scalar processing, and does not supply the image data having undergone the vector processing to the scalar processor if the vector processor determines that the image processing does not include scalar processing.

3. The image processing apparatus according to claim 1, wherein

the vector processor includes an image processor, and

the scalar processor includes a central processor.

4. The image processing apparatus according to claim 1, wherein

the vector processing includes processing grid data, and

the scalar processing includes at least one of an arithmetic operation including conditional branch operation and a numerical operation.

5. The image processing apparatus according to claim 1, wherein further comprising an internal bus arranged between the vector processor and the scalar processor,

wherein a band rate from the vector processor to the internal bus is lower than a band rate from the internal bus to the vector processor.

6. An image processing system comprising:

an image acquiring apparatus which acquires an image signal of an object by continuously scanning the object, and converts the image signal into image data;

an image processing apparatus according to claim 1, which performs image processing on the image data; and

a high-speed external bus which connects the image acquiring apparatus and the image processing apparatus,

the image acquiring apparatus including

an image acquiring unit which acquires an image signal of the object by scanning the object,

a data conversion unit which converts the image signal into image data, and

a first interface unit which is connected to the high-speed external bus and outputs the image data to the high-speed external bus,

wherein a band rate of the high-speed external bus is higher than a transfer rate of the image data from the data conversion unit to the first interface unit.

7. The image processing system according to claim 6, wherein

the band rate of the high-speed external bus is higher than 2 Gbps.

8. The image processing system according to claim 6, wherein

the image processing apparatus further includes

a second interface unit which is connected to the high-speed external bus and receives the image data, and

a storage unit which stores the image data,

wherein a transfer rate of the image data from the second interface unit to the storage unit is higher than a transfer rate of the image data from the data conversion unit to the first interface unit.

9. The image processing system according to claim 6, wherein

the high-speed external bus includes a serial ATA bus,

the image acquiring apparatus includes a scanner, and

the image processing apparatus includes a computer.

10. The image processing system according to claim 6, wherein

the image processing apparatus further includes

a second interface unit which is connected to the high-speed external bus and receives the image data,

a storage unit which stores the image data, and

a high-speed internal bus which connects the second interface unit, the storage unit, and the processors to each other, and

a band rate of the high-speed internal bus is higher than a transfer rate of the image data from the data conversion unit to the first interface unit.

11. The image processing system according to claim 10, wherein a band rate of the high-speed internal bus is higher than 2 Gbps.

12. The image processing system according to claim 10, wherein

the high-speed external bus includes a serial ATA bus,

the high-speed internal bus includes a PCI-Express bus,

the image acquiring apparatus includes a scanner, and

the image processing apparatus includes a computer.

13. An image processing method for performing image processing including at least vector processing, comprising:

a vector processing step of performing the vector processing on image data by using an image processor; and

a scalar processing step of performing, if the image processing further includes scalar processing in addition to the vector processing, the scalar processing on the image data having undergone the vector processing by using a central processor,

wherein the vector processing includes a process of decreasing a resolution of image data, and

the scalar processing includes a process of specifying a color gamut of each pixel in image data.