DYNAMIC REFERENCE FREQUENCY FOR FRACTIONAL-N PHASE-LOCKED LOOP

• US 20090221235A1
• Filed: 02/05/2009
• Published: 09/03/2009
• Est. Priority Date: 02/29/2008
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Bossu, Frederic, Aparin, Vladimir, Ciccarelli, Steven C., Wang, Kevin H.
• Granted Patent: US 9,287,886 B2
• Time in Patent Office: Days
• US Class Current: 455/62
• CPC Class Codes: H03L 7/1974 for fractional frequency division

Abstract

Within a receiver, the frequency of a comparison reference clock signal supplied to a fractional-N Phase-Locked Loop (PLL) is dynamically changed such that undesirable reciprocal mixing of reference spurs with known jammers (for example, transmit leakage) is minimized. As the transmit channel changes within a band, and as the transmit leakage frequency changes, a circuit changes the frequency of the comparison reference clock signal such that reference spurs generated by the PLL are moved in frequency so that they do not reciprocally mix with transmitter leakage in undesirable ways. In a second aspect, the PLL is operable either as an integer-N PLL or a fractional-N PLL. In low total receive power situations, the PLL operates as an integer-N PLL to reduce receiver susceptibility to fractional-N spurs. In a third aspect, jammer detect information is used to determine the comparison reference clock signal frequency.

Claims

1. A method comprising:

changing a frequency of a comparison reference clock signal supplied to a Phase-Locked Loop (PLL) based at least in part on transmit channel information, wherein the PLL supplies a local oscillator signal to a mixer of a receiver.

2. The method of claim 1, wherein the receiver is a part of a transceiver of a cellular telephone, wherein the transceiver includes a transmitter, and wherein the transmit channel information determines a transmit channel upon which the transmitter transmits.

3. The method of claim 1, wherein the transmit channel information is channel assignment information, and wherein the channel assignment information identifies a transmit channel.

4. The method of claim 1, wherein the transmit channel information is channel assignment information, and wherein the channel assignment information identifies a transmit channel and a receive channel.

5. The method of claim 1, wherein the transmit channel information identifies one of a plurality of transmit channels of a transmit band.

6. The method of claim 1, wherein the changing of the frequency of the comparison reference clock signal is based in part on information indicative of an amount of receive power being received by the receiver.

7. The method of claim 1, wherein the changing of the frequency of the comparison reference clock signal is based in part on jammer detect information, wherein the jammer detect information is indicative of whether a jammer is being received by the receiver.

8. The method of claim 1, wherein the transmit channel information is used as an input to a lookup function, and wherein the lookup function outputs information used in said changing of the frequency of the comparison reference clock signal.

9. The method of claim 1, wherein the transmit channel information is used as an input to a lookup function, and wherein the lookup function outputs PLL control information.

10. The method of claim 1, wherein said changing involves:

(a) a processor that is part of a first integrated circuit using the transmit channel information as an input to a lookup function, (b) the processor obtaining control information as an output from the lookup function, and (c) the control information being communicated from the first integrated circuit to a second integrated circuit that includes the PLL such that the control information is supplied to the PLL and results in the PLL changing the frequency of the comparison reference clock signal.

11. The method of claim 1, wherein the comparison reference clock signal has a first frequency for a first amount of time when a transmitter is transmitting in a first transmit channel of a transmit band, and wherein the comparison reference clock signal has a second frequency for a second amount of time when the transmitter is transmitting in a second transmit channel of the transmit band.

12. The method of claim 1, wherein the PLL is a PLL that is operable in a selectable one of a fractional-N mode and an integer-N mode.

13. The method of claim 1, wherein the transmit channel information is used as an input to a lookup function, wherein the lookup function outputs PLL control information, and wherein the PLL control information determines whether the PLL operates in a fractional-N mode or in an integer-N mode.

14. The method of claim 1, further comprising:

receiving a reference clock signal of a fixed signal frequency from a crystal oscillator and using the reference clock signal to generate the comparison reference clock signal.

15. A method comprising:

changing a mode of operation of a Phase-Locked Loop (PLL) from a fractional-N mode to an integer-N mode based at least in part on receive power information, wherein the PLL supplies a local oscillator signal to a mixer of a receiver, and wherein the receive power information is indicative of an amount of receive power being received by the receiver.

16. A method comprising:

(a) detecting a jammer being received in a receiver; and

(b) based at least in part on the detecting of the detecting of the jammer in (a) changing a frequency of a comparison reference clock signal supplied to a Phase-Locked Loop (PLL), wherein the PLL supplies a local oscillator signal to a mixer of the receiver.

17. A circuit comprising:

a Phase-Locked Loop (PLL) that supplies a local oscillator signal to a mixer of a receiver;

a Programmable Comparison Reference Clock Signal Generator (PCRCSG) that supplies a comparison reference clock signal to the PLL, wherein the comparison reference clock signal has a frequency; and

a lookup function circuit that uses transmit channel information as an input and generates PLL control information therefrom as an output, wherein the PLL control information is supplied to the PCRCSG such that the frequency of the comparison reference clock signal is changed based at least in part on the transmit channel information.

18. The circuit of claim 17, further comprising:

a transmitter, wherein the transmit channel information determines a transmit channel upon which the transmitter transmits.

19. The circuit of claim 17, wherein the transmit channel information is channel assignment information, and wherein the channel assignment information identifies a transmit channel.

20. The circuit of claim 17, wherein the transmit channel information is channel assignment information, and wherein the channel assignment information identifies a transmit channel and a receive channel.

21. The circuit of claim 17, wherein the transmit channel information identifies one of a plurality of transmit channels of a transmit band.

22. The circuit of claim 17, wherein the lookup function circuit includes a processor and a set of processor-executable instructions stored on a processor-readable medium.

23. A circuit comprising:

a lookup function circuit that uses transmit channel information as an input and generates phase-locked loop control information therefrom as an output, wherein the phase-locked loop control information is for controlling a frequency of a comparison reference clock signal supplied to a Phase-Locked Loop (PLL) of a local oscillator of a receiver.

24. The circuit of claim 23, wherein the circuit is a part of a first integrated circuit, wherein the PLL of the local oscillator is a part of a second integrated circuit, and wherein the first circuit supplies the phase-locked loop control information to the second integrated circuit.

25. A computer program product, comprising:

computer-readable medium comprising;

code for causing a computer to perform a lookup operation by using transmit channel information as an input to the lookup operation such that phase-locked loop control information is output from the lookup operation, wherein the phase-locked loop control information is for controlling a frequency of a comparison reference clock signal supplied to a Phase-Locked Loop (PLL) of a local oscillator of a receiver.

26. The computer program product of claim 25, wherein the computer-readable medium further comprises:

code for causing a computer to cause the phase-locked loop control information to be supplied to the PLL of the local oscillator of the receiver.

27. The computer program product of claim 25, wherein execution of code results in the frequency of the comparison reference clock signal having a first frequency during a first amount of time when a transmitter is transmitting in a first transmit channel of a band, and results in the frequency of the comparison reference clock signal having a second frequency during a second amount of time when the transmitter is transmitting in a second transmit channel of the band.

28. An apparatus comprising:

a Phase-Locked Loop (PLL) that receives a comparison reference clock signal, wherein the PLL is a part of a local oscillator of a receiver; and

means for changing a frequency of the comparison reference clock signal based at least in part on transmit channel information, wherein the comparison reference clock signal is supplied to the PLL.

29. The apparatus of claim 28, wherein the receiver is a part of a transceiver, wherein the transceiver includes a transmitter, and wherein the means changes the frequency of the comparison reference clock signal such that the frequency of the comparison reference clock signal has a first frequency during a first amount of time when the transmitter is transmitting in a first transmit channel of a band, and such that the frequency of the comparison reference clock signal has a second frequency during a second amount of time when the transmitter is transmitting in a second transmit channel of the band.

30. The apparatus of claim 29, wherein the means is also for performing a lookup operation by using the transmit channel information as an input to the lookup operation such that phase-locked loop control information is output from the lookup operation, wherein the phase-locked loop control information is for controlling the frequency of the comparison reference clock signal.

31. The apparatus of claim 30, wherein the means includes a processor, a serial bus, and a programmable comparison reference clock signal generator.

32. The apparatus of claim 28, wherein the PLL is operable in a selectable one of a fractional-N mode and an integer-N mode.

33. A method comprising:

(a) communicating information across a bus from a first integrated circuit of a transceiver to a second integrated circuit of the transceiver such that a frequency of a comparison reference clock signal changes from a first frequency to a second frequency when a transmitter of the transceiver is operating within a single transmit band, wherein the comparison reference clock signal is supplied to a Phase-Locked Loop (PLL) of a local oscillator of a receiver of the transceiver, and wherein the PLL is a part of the second integrated circuit.

34. The method of claim 33, wherein the changing of the frequency of the comparison reference clock signal occurs at least in part in response to a change in transmit channel allocation within the transmit band.

35. The method of claim 33, further comprising:

(b) detecting a jammer in the second integrated circuit and communicating an indication of the detecting across the bus from the second integrated circuit to the first integrated circuit, wherein the communicating of (a) occurs at least in part in response to the detecting of the jammer in (b).