SILICON SUBSTRATE AND MANUFACTURING METHOD THEREOF

• US 20090224367A1
• Filed: 03/03/2009
• Published: 09/10/2009
• Est. Priority Date: 03/05/2008
• Status: Active Grant

• Current Assignee: Sumco Corporation
• Original Assignee: Sumco Corporation
• Inventors: KURITA, Kazunari, OMOTE, Shuichi
• Granted Patent: US 8,101,508 B2
• Time in Patent Office: Days
• US Class Current: 257/607
• CPC Class Codes: C30B 15/00 Single-crystal growth by pulling from a melt, e.g. Czochralski method under a protective fluid C30B27/00
• CPC Class Codes: C30B 29/06 Silicon
• CPC Class Codes: H01L 21/3221 of silicon bodies, e.g. for gettering
• CPC Class Codes: H01L 27/146 Imager structures

Abstract

A silicon substrate is manufactured from a single crystal silicon that is doped with phosphorus (P) and is grown by a CZ method to have a predetermined carbon concentration and a predetermined initial oxygen concentration. An n+ epitaxial layer or an n+ implantation layer that is doped with phosphorus (P) at a predetermined concentration or more is formed on the silicon substrate. An n epitaxial layer that is doped with phosphorus (P) at a predetermined concentration is formed on the n+ layer.

Claims

1. A first silicon substrate comprising:

a silicon substrate, an n+ epitaxial layer, and an n epitaxial layer,

wherein the silicon substrate manufactured from a single crystal silicon produced by a CZ method which includes phosphorus (P), a carbon concentration that is greater than or equal to 1.0×

10¹⁶ atoms/cm³ and less than or equal to 1.0×

10¹⁷ atoms/cm³, and an oxygen concentration that is greater than or equal to 1.4×

10¹⁸ atoms/cm³ and less than or equal to 1.6×

10¹⁸ atoms/cm³;

the n+ epitaxial layer that is doped with phosphorus (P) at a concentration greater than or equal to 1.0×

10¹⁸ atoms/cm³ and is formed on the silicon substrate; and

the n epitaxial layer that is doped with phosphorus (P) at a concentration in the range of 1.0×

10¹⁶ atoms/cm³ to 1.0×

10¹⁸ atoms/cm³ and is formed on the n+ epitaxial layer.

2. The first silicon substrate according to claim 1,

wherein the thickness of the n+ epitaxial layer is greater than or equal to 0.1 μ

m and less than or equal to 0.6 μ

m.

3. The first silicon substrate according to claim 1,

wherein the thickness of the n epitaxial layer is greater than or equal to 2 μ

m and less than or equal to 10 μ

m.

4. A method of manufacturing a first silicon substrate, comprising:

a preparation step of growing a single crystal silicon that is doped with phosphorus (P) and has a carbon concentration that is greater than or equal to 1.0×

10¹⁶ atoms/cm³ and less than or equal to 1.0×

10¹⁷ atoms/cm³ and an initial oxygen concentration that is greater than or equal to 1.4×

10¹⁸ atoms/cm³ and less than or equal to 1.6×

10¹⁸ atoms/cm³ using a CZ method, and slicing the single crystal silicon;

a step of forming an n+ epitaxial layer that is doped with phosphorus (P) at a concentration greater than or equal to 1.0×

10¹⁹ atoms/cm³ on the sliced single crystal silicon; and

a step of forming a n epitaxial layer that is doped with phosphorus (P) at a concentration greater than or equal to 1.0×

10¹⁶ atoms/cm³ and less than or equal to 1.0×

10¹⁸ atoms/cm³ on the n+ epitaxial layer.

5. The method of manufacturing a first silicon substrate according to claim 4,

wherein the thickness of the n+ epitaxial layer is greater than or equal to 0.2 μ

m and less than or equal to 0.6 μ

m.

6. The method of manufacturing a first silicon substrate according to claim 4,

wherein the thickness of the n epitaxial layer is greater than or equal to 2 μ

m and less than or equal to 10 μ

m.

7. A first silicon substrate for a solid-state imaging device manufactured by the manufacturing method according to claim 4.

8. A second silicon substrate comprising:

a silicon substrate, an n+ implantation layer, and an n epitaxial layer,

wherein the silicon substrate manufactured from a single crystal silicon produced by CZ method which includes phosphorus (P), a carbon concentration that is greater than or equal to 1.0×

10¹⁶ atoms/cm³ and less than or equal to 1.6×

10¹⁷ atoms/cm³, and an oxygen concentration that is greater than or equal to 1.4×

10¹⁸ atoms/cm³ and less than or equal to 1.6×

10¹⁸ atoms/cm³;

the n+ implantation layer that is doped with an n type dopant at a concentration greater than or equal to 1.0×

10¹⁸ atoms/cm³ by ion implantation and is formed on the silicon substrate; and

the n epitaxial layer that is doped with an n type dopant at a concentration greater than or equal to 1.0×

10¹⁶ atoms/cm³ and less than or equal to 1.0×

10¹⁸ atoms/cm³ and is formed on the n+ implantation layer.

9. The second silicon substrate according to claim 8,

wherein the thickness of the n+ implantation layer is greater than or equal to 0.2 μ

m and less than or equal to 0.6 μ

m.

10. The second silicon substrate according to claim 8,

wherein the thickness of the n epitaxial layer is greater than or equal to 2 μ

m and less than or equal to 10 μ

m.

11. A method of manufacturing a second silicon substrate, comprising:

a preparation step of growing a single crystal silicon that is doped with phosphorus (P) and has a carbon concentration that is greater than or equal to 1.0×

10¹⁶ atoms/cm³ and less than or equal to 1.6×

10¹⁷ atoms/cm³ and an initial oxygen concentration that is greater than or equal to 1.4×

10¹⁸ atoms/cm³ and less than or equal to 1.6×

10¹⁸ atoms/cm³ using a CZ method, and slicing the single crystal silicon;

an implantation step of implanting an n type dopant into the surface of the sliced single crystal silicon at a concentration that is greater than or equal to 1.0×

10¹⁸ atoms/cm³ to form an n+ implantation layer; and

an epitaxial step of forming a n epitaxial layer that is doped with an n type dopant at a concentration greater than or equal to 1.0×

10¹⁶ atoms/cm³ and less than or equal to 1.0×

10¹⁷ atoms/cm³ on the n+ implantation layer.

12. The method of manufacturing the second silicon substrate according to claim 11,

wherein the thickness of the n+ implantation layer is greater than or equal to 0.2 μ

m and less than or equal to 0.6 μ

m.

13. The method of manufacturing the second silicon substrate according to claim 11,

wherein the thickness of the n epitaxial layer is greater than or equal to 2 μ

m and less than or equal to 10 μ

m.

14. The method of manufacturing the second silicon substrate according to claim 11, further comprising:

a recovery heat treatment step that is performed at a temperature greater than or equal to 950°

C. and less than or equal to 1200°

C. after the implantation step.

15. The method of manufacturing a silicon substrate according to claim 11, further comprising:

a heat treatment step for obtaining a gettering effect that is performed at a temperature greater than or equal to 600°

C. and less than or equal to 800°

C. for a time of 15 minutes to 4 hours after the preparation step.

16. A second silicon substrate for a solid-state imaging device manufactured by the manufacturing method according to claim 11.