Method And Apparatus For Designing A Custom Test System

• US 20090224793A1
• Filed: 03/07/2008
• Published: 09/10/2009
• Est. Priority Date: 03/07/2008
• Status: Abandoned Application

• Current Assignee: FormFactor Incorporated
• Original Assignee: FormFactor Incorporated
• Inventors: Kemmerling, Todd Ryland
• Application Number:
  US12/044,600
• Publication Number:
  US 20090224793A1
• Time in Patent Office: Days
• US Class Current: 324/750.150
• CPC Class Codes: G01R 31/318307 computer-aided, e.g. automatic test program generator [ATPG], program translations, test program debugging
• CPC Class Codes: G06F 8/30 Creation or generation of source code

Abstract

Methods, apparatus, and computer readable media for designing a custom test system are described. Examples of the invention can relate to a method of generating test system software for a semiconductor test system. In some examples, a method can include obtaining a configuration of the semiconductor test system, the configuration including a description of a device under test (DUT) and a description of test hardware; and generating an application programming interface (API) specific to the configuration of the semiconductor test system, the API being generated based on the description of the DUT and the description of the test hardware, the API providing a programming interface between the test system software and the test hardware to facilitate testing of the DUT.

Claims

1. A method of generating test system software for a semiconductor test system, comprising:

obtaining a configuration of the semiconductor test system, the configuration including a description of a device under test (DUT) and a description of test hardware; and

generating an application programming interface (API) specific to the configuration of the semiconductor test system, the API being generated based on the description of the DUT and the description of the test hardware, the API providing a programming interface between the test system software and the test hardware to facilitate testing of the DUT.

2. The method of claim 1, wherein the test system software includes at least one component nonspecific to the configuration of the semiconductor test system, each of the at least one component calling routines defined by the API.

3. The method of claim 1, wherein the test hardware includes a plurality of test instruments configured for communication with the DUT through a probe card assembly by a prober, and wherein the API includes a hardware library that provides a programming interface to the plurality of test instruments and the prober.

4. The method of claim 3, wherein the test system software includes a test backend nonspecific to the configuration of the semiconductor test system, the test backend configured to call routines defined by the hardware library to control the plurality of test instruments and the prober.

5. The method of claim 4, wherein the API includes a command library that provides programming interface for controlling the testing of the DUT.

6. The method of claim 5, wherein the test system software includes a front end nonspecific to the configuration of the semiconductor test system, the front end configured to call routines defined by the command library to control the test backend.

7. The method of claim 1, wherein the test system software includes at least one component and a database, wherein the API includes a database library that provides a programming interface to the database, and wherein the at least one component is configured to call routines defined by the database library to access the database.

8. An apparatus for generating test system software for a semiconductor test system, comprising:

means for obtaining a configuration of the semiconductor test system, the configuration including a description of a device under test (DUT) and a description of test hardware; and

means for generating an application programming interface (API) specific to the configuration of the semiconductor test system, the API being generated based on the description of the DUT and the description of the test hardware, the API providing a programming interface between the test system software and the test hardware to facilitate testing of the DUT.

9. The apparatus of claim 8, wherein the test system software includes at least one component nonspecific to the configuration of the semiconductor test system, each of the at least one component calling routines defined by the API.

10. The apparatus of claim 8, wherein the test hardware includes a plurality of test instruments configured for communication with the DUT through a probe card assembly by a prober, and wherein the API includes a hardware library that provides a programming interface to the plurality of test instruments and the prober.

11. The apparatus of claim 8, wherein the API includes a command library that provides programming interface for controlling the testing of the DUT.

12. The apparatus of claim 8, wherein the test system software includes at least one component and a database, wherein the API includes a database library that provides a programming interface to the database, and wherein the at least one component is configured to call routines defined by the database library to access the database.

13. A semiconductor test system, comprising:

test hardware configured to test a device under test (DUT); and

a test system controller, coupled to the tester, configured to execute test system software, the test system software having an application programming interface (API) based on, and specific to, a description of the DUT and a description of the test hardware, the API providing a programming interface between the test system software and the test hardware to facilitate testing of the DUT.

14. The semiconductor test system of claim 13, wherein the test system software includes at least one component nonspecific to the description of the DUT and the description of the test hardware, each of the at least one component calling routines defined by the API.

15. The semiconductor test system of claim 13, wherein the test hardware includes a plurality of test instruments configured for communication with the DUT through a probe card assembly by a prober, and wherein the API includes a hardware library that provides a programming interface to the plurality of test instruments and the prober.

16. The semiconductor test system of claim 15, wherein the test system software includes a test backend nonspecific to the description of the test hardware and the description of the DUT, the test backend configured call routines defined by the hardware library to control the plurality of test instruments and the prober.

17. The semiconductor test system of claim 16, wherein the API includes a command library that provides programming interface for controlling the testing of the DUT.

18. The semiconductor test system of claim 17, wherein the test system software includes a front end nonspecific to the description of the test hardware and the description of the DUT, the front end configured to call routines defined by the command library to control the test backend.

19. The semiconductor test system of claim 13, wherein the test system software includes at least one component and a database, wherein the API includes a database library that provides a programming interface to the database, and wherein the at least one component is configured to call routines defined by the database library to access the database.

20. A computer readable medium having stored thereon instructions that, when executed by a processor, cause the processor to perform a method of generating test system software for a semiconductor test system, comprising:

obtaining a configuration of the semiconductor test system, the configuration including a description of a device under test (DUT) and a description of test hardware; and

generating an application programming interface (API) specific to the configuration of the semiconductor test system, the API being generated based on the description of the DUT and the description of the test hardware, the API providing a programming interface between the test system software and the test hardware to facilitate testing of the DUT.

21. -40. (canceled)