ELECTRONIC ENDOSCOPIC APPARATUS

• US 20090227839A1
• Filed: 04/27/2006
• Published: 09/10/2009
• Est. Priority Date: 06/21/2005
• Status: Active Grant

• Current Assignee: Olympus Corporation
• Original Assignee: Olympus Medical Systems Corporation (Olympus Corporation)
• Inventors: Shimada, Atsushi, Yabe, Yusuke, Takahashi, Tomoya, Hashimoto, Susumu
• Granted Patent: US 8,764,636 B2
• Time in Patent Office: Days
• US Class Current: 600/118
• CPC Class Codes: A61B 1/00006 of control signals
• CPC Class Codes: A61B 1/00055 for alerting the user
• CPC Class Codes: A61B 1/00062 provided with means for preventing overuse
• CPC Class Codes: A61B 1/045 Control thereof
• CPC Class Codes: A61B 2560/0276 Determining malfunction
• CPC Class Codes: G02B 23/2484 Arrangements in relation to a camera or imaging device processing or control of video signals generated by an endoscope H04N23/60, H04N23/70

Abstract

An electronic endoscopic apparatus of the present invention can improve the usage efficiency of a circuit of a control section therein and can improve the reliability of operations of the circuit. The electronic endoscopic apparatus is an electronic endoscopic apparatus having multiple operation modes to be executed exclusively, the apparatus internally including an FPGA 1 that internally includes a CPU 10 and peripheral circuits and controls the execution of the operation modes and a switching request detecting section that detects a request for switching to the operation mode to be executed, wherein the internal configuration of the FPGA 1 is changed based on the detection result by the switching request detecting section.

Claims

1. An electronic endoscopic apparatus having multiple operation modes to be executed exclusively, the apparatus comprising:

a control section that controls the execution of the operation modes; and

a switching request detecting section that detects a request for switching to the operation mode to be executed,

wherein the internal configuration of the control section is changed based on the detection result by the switching request detecting section.

2. The electronic endoscopic apparatus according to claim 1, wherein the control section has an FPGA and/or a CPLD internally including a CPU and a peripheral circuit, and the internal configuration or configurations of the FPGA and/or CPLD is/are changed based on the detection result by the switching request detecting section.

3. The electronic endoscopic apparatus according to claim 2, wherein the control section further has a non-volatile memory storing data on the internal configuration or configurations of the FPGA and/or CPLD for each of the multiple operation modes and software to be executed by the CPU.

4. The electronic endoscopic apparatus according to claim 3, wherein the control section changes the internal configuration of the control section by downloading the data on the internal configuration from the non-volatile memory to the FPGA and/or CPLD.

5. The electronic endoscopic apparatus according to claim 2, wherein the control section changes the internal configuration in accordance with the operation mode based on the detection result detected by the switching request detecting section during the initializing operation of the control section.

6. The electronic endoscopic apparatus according to claim 1, wherein, if an abnormality in the electronic endoscopic apparatus is detected, the switching request detecting section detects a request for switching to a safety mode, and the internal configuration of the control section is changed to the internal configuration of the safety mode.

7. An electronic endoscopic apparatus having multiple operation modes to be executed exclusively, the apparatus comprising:

a control section that has an FPGA and/or CPLD internally having a CPU and a peripheral circuit and controls the execution of the operation modes,

wherein the internal configuration or configurations of the FPGA and/or CPLD differs/differ according to the operation mode to be executed.

8. The electronic endoscopic apparatus according to claim 7, wherein the control section further has a non-volatile memory storing data on the internal configuration or configurations of the FPGA and/or CPLD for each of the multiple operation modes and software to be executed by the CPU.

9. The electronic endoscopic apparatus according to claim 8, wherein the control section changes the internal configuration of the control section by downloading the data on the internal configuration from the non-volatile memory to the FPGA and/or CPLD).

10. An electronic endoscopic apparatus comprising:

a controller that outputs a first pulse signal during a normal operation;

a dummy pulse generating section that generates a second pulse signal;

a completion-of-startup detecting section that detects the completion of the startup of the controller;

an abnormality monitoring signal generating section that outputs one of the first pulse signal and the second pulse signal as an abnormality monitoring signal based on the detection result of the completion-of-startup detecting section; and

an abnormality detecting section that detects an abnormality in the controller based on the abnormality monitoring signal and outputs a reset signal.

11. The electronic endoscopic apparatus according to claim 10, wherein the abnormality monitoring signal generating section outputs the second pulse signal as the abnormality monitoring signal if the startup of the controller is not completed and outputs the first pulse signal as the abnormality monitoring signal if the startup of the controller is completed.

12. The electronic endoscopic apparatus according to claim 10, wherein the abnormality monitoring signal generating section has a startup monitoring section that monitors the startup state of the controller and stops the output of the abnormality monitoring signal if an abnormality occurs during the startup of the controller based on the monitoring result by the startup monitoring section.

13. The electronic endoscopic apparatus according to claim 10, wherein the abnormality detecting section is included within the controller.

16. The electronic endoscopic apparatus according to claim 10, wherein the controller includes a CPU within an FPGA or a CPLD.

14. An electronic endoscopic apparatus comprising:

a controller that outputs a pulse signal during a normal operation;

a completion-of-startup detecting section that detects the completion of the startup of the controller;

an abnormality detecting section that detects an abnormality in the controller based on the pulse signal and outputs an abnormality detection signal; and

a reset signal generating section that outputs a reset signal if the abnormality detection signal is received and if the startup of the controller is completed based on the detection result by the completion-of-startup detecting section.

15. The electronic endoscopic apparatus according to claim 14, wherein the reset signal generating section has a startup monitoring section that monitors the startup state of the controller and outputs the reset signal if the an abnormality occurs during the startup of the controller based on the monitoring result by the startup monitoring section.

17. The electronic endoscopic apparatus according to claim 14, wherein the controller includes a CPU within an FPGA or a CPLD.