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Leadframe package with dual lead configurations

  • US 20090230520A1
  • Filed: 05/26/2009
  • Published: 09/17/2009
  • Est. Priority Date: 11/12/2004
  • Status: Abandoned Application
First Claim
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1. A leadframe package comprising:

  • a semiconductor chip having a plurality of signal chip pads and a plurality of fixed voltage chip pads formed on an active surface;

    a leadframe having a plurality of signal leads having an average length LSL and a plurality of fixed voltage leads designated for a single voltage having an average length LFL;

    signal bonding wires having an average length LSW electrically connecting the signal leads to corresponding signal chip pads; and

    fixed voltage bonding wires having an average length LFW electrically connecting the fixed voltage leads to corresponding fixed voltage chip pads;

    wherein the average length of the signal leads LSL and the average length of the fixed voltage leads LFL satisfy the expression LSL<

    LFL, and the signal leads have an average width WSL and the fixed voltage leads have an average width WFL that satisfy the expression WSL<

    WF.

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