MOS TRANSISTOR CONTROL
First Claim
1. A method of controlling a switching assembly comprising:
- a plurality of transistors connected in parallel;
a linear operating mode in which an internal resistance of said plurality of transistors can be controlled in a given range of values;
a closed-switch operating mode, in which said internal resistance is equal to a minimum value; and
an off operating mode, in which said internal resistance is equal to a maximum value;
wherein said method further comprises;
a first operating phase during which a current flows from a source terminal to a drain terminal of said plurality of transistors;
a second operating phase in which no current flows;
wherein said method which comprises said steps according to which, successively;
(a) wherein said plurality of transistors of the switching assembly are controlled in a common fashion in closed-switch mode during at least part of said first phase;
(b) wherein said plurality of transistors are controlled in a common fashion in linear mode at the end of said first phase during at least a first given period; and
(c) wherein said plurality of transistors are controlled in a common fashion in off mode during at least part of said second phase.
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Accused Products
Abstract
The invention concerns a method for controlling a switching assembly comprising a plurality of transistors connected in parallel, having a linear operating mode, a closed-switch operating mode and an off operating mode including a first operating phase during which a current flows from a source terminal to a drain terminal and a second operating phase during which no current flows. The method includes the following successive steps; (a) controlling the switching assembly in closed-switch mode during part of the first phase; (b) controlling the switching assembly in linear mode; (c) controlling the assembly in off mode during part of the second phase.
25 Citations
16 Claims
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1. A method of controlling a switching assembly comprising:
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a plurality of transistors connected in parallel; a linear operating mode in which an internal resistance of said plurality of transistors can be controlled in a given range of values; a closed-switch operating mode, in which said internal resistance is equal to a minimum value; and an off operating mode, in which said internal resistance is equal to a maximum value; wherein said method further comprises; a first operating phase during which a current flows from a source terminal to a drain terminal of said plurality of transistors; a second operating phase in which no current flows; wherein said method which comprises said steps according to which, successively; (a) wherein said plurality of transistors of the switching assembly are controlled in a common fashion in closed-switch mode during at least part of said first phase; (b) wherein said plurality of transistors are controlled in a common fashion in linear mode at the end of said first phase during at least a first given period; and (c) wherein said plurality of transistors are controlled in a common fashion in off mode during at least part of said second phase. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of controlling a switching assembly comprising a plurality of transistors adapted to comprise the following operating modes:
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a linear operating mode in which an internal resistance of said plurality of transistors can be controlled in a given range of values; an off operating mode in which said internal resistance is equal to a maximum value; said method comprising the steps of; causing a first operating phase during which a current flows from a source terminal to a drain terminal of said plurality of transistors; causing a second operating phase in which no current flows; controlling said plurality of transistors in a closed-switch operating mode during at least part of said first operating phase; wherever said internal resistance is equal to a minimum value during said closed switch operating mode; controlling said plurality of transistors in said linear operating mode at the end of said first operating phase during at least a first given period; and controlling said plurality of transistors in said off operating mode during at least part of said second operating phase. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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Specification