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STACKED BIT LINE DUAL WORD LINE NONVOLATILE MEMORY

  • US 20090236639A1
  • Filed: 06/01/2009
  • Published: 09/24/2009
  • Est. Priority Date: 08/31/2005
  • Status: Active Grant
First Claim
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1. A memory device, comprising:

  • a substrate;

    a polysilicon line substantially vertical to the substrate;

    first and second conductive lines over the substrate;

    a first memory cell between the first conductive line and the polysilicon line; and

    a second memory cell between the second conductive line and the polysilicon line, wherein the first memory cell is over the second memory cell.

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