N-ary Three-Dimensional Mask-Programmable Read-Only Memory
First Claim
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1. An N-ary three-dimensional mask-programmable read-only memory (N-3DMPROM), comprising:
- a semiconductor substrate including transistors;
a plurality of vertically stacked mask-programmable memory levels, said memory levels stacked above and coupled to said substrate, each of said memory level comprising a plurality of address-selection lines and mask-programmable memory cells, each of said memory cells comprising a diode-like device and having one of at least N possible states with N>
2, wherein memory cells in different states have different ranges of read current at a read voltage;
wherein said substrate further comprises means for converting data from said memory levels into binary.
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Abstract
N-ary three-dimensional mask-programmable read-only memory (N-3DMPROM) stores multi-bit-per-cell. Its memory cells can have N states (N>2) and data are stored as N-ary codes. N-3DMPROM has a larger storage density than the prior-art binary 3D-MPROM. One advantage of N-3DROM over other N-ary memory (e.g. multi-level-cell flash) is that its array efficiency can be kept high. N-3DMPROM could be geometry-defined, junction-defined, or a combination thereof.
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Citations
20 Claims
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1. An N-ary three-dimensional mask-programmable read-only memory (N-3DMPROM), comprising:
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a semiconductor substrate including transistors; a plurality of vertically stacked mask-programmable memory levels, said memory levels stacked above and coupled to said substrate, each of said memory level comprising a plurality of address-selection lines and mask-programmable memory cells, each of said memory cells comprising a diode-like device and having one of at least N possible states with N>
2, wherein memory cells in different states have different ranges of read current at a read voltage;wherein said substrate further comprises means for converting data from said memory levels into binary. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An N-ary three-dimensional mask-programmable read-only memory (N-3DMPROM), comprising:
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a semiconductor substrate including transistors; a plurality of vertically stacked mask-programmable memory levels, said memory levels stacked above and coupled to said substrate, each of said memory level comprising a plurality of address-selection lines and mask-programmable memory cells, each of said memory cells comprising a diode-like device and having one of at least N possible states with N>
2, wherein memory cells in a same state have substantially the same geometry, and memory cells in at least three different states have different geometries and have different ranges of read current at a read voltage;wherein said substrate further comprises means for converting data from said memory levels into binary. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An N-ary three-dimensional mask-programmable read-only memory (N-3DMPROM), comprising:
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a semiconductor substrate including transistors; a plurality of vertically stacked mask-programmable memory levels, said memory levels stacked above and coupled to said substrate, each of said memory level comprising a plurality of address-selection lines and mask-programmable memory cells, each of said memory cells comprising a diode-like device and having one of at least N possible states with N>
2, wherein memory cells in a same state have substantially the same junction, and memory cells in at least two different states have different junctions and have different ranges of read current at a read voltage;wherein said substrate further comprises means for converting data from said memory levels into binary. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification