METHOD OF SUPPLYING AN OPERATING VOLTAGE OF A FLASH MEMORY DEVICE

• US 20090238007A1
• Filed: 05/08/2008
• Published: 09/24/2009
• Est. Priority Date: 03/19/2008
• Status: Abandoned Application

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: JANG, Chae Kyu
• Application Number:
  US12/117,700
• Publication Number:
  US 20090238007A1
• Time in Patent Office: Days
• US Class Current: 365/185.190
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
• CPC Class Codes: G11C 8/08 Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Abstract

A method of supplying an operating voltage of a flash memory device includes supplying an operating voltage to a word line selected according to an input address, and changing a pass voltage according to a change of the operating voltage level. The pass voltage is supplied to unselected word lines other than the selected word line.

Claims

1. A method of supplying a program voltage of a flash memory device, the method comprising:

supplying a program voltage of an incremental step pulse programming (ISPP) method to a word line selected according to an input address;

changing a pass voltage according to a change of the program voltage level, wherein the pass voltage is supplied to unselected word lines other than the selected word line; and

supplying the changed pass voltage.

2. The method of claim 1, wherein the program voltage and the pass voltage are increased as high as a set voltage amount according to the ISPP method.

3. The method of claim 1, wherein the pass voltage is changed to have the same voltage step as the changed program voltage.

4. A method of supplying a read voltage of a flash memory device, the method comprising:

supplying a read voltage to a word line selected according to an input address, wherein the read voltage is sequentially set;

changing a pass voltage according to a change of the read voltage level, wherein the pass voltage is supplied to unselected word lines other than the selected word line; and

supplying the changed pass voltage.

5. The method of claim 4, wherein when the read voltage is set to first to k^th read voltages in order of higher voltages, the pass voltage is set to first to k^th pass voltages in order of higher voltages.

6. A method of supplying an operating voltage of a flash memory device, the method comprising:

supplying an operating voltage to a word line selected according to an input address;

changing a pass voltage according to a change of the operating voltage level, wherein the pass voltage is supplied to unselected word lines other than the selected word line; and

supplying the changed pass voltage.

7. The method of claim 6, further comprising:

when the flash memory device performs a program operation, applying a program voltage to the selected word line, and

applying the pass voltage to the unselected word lines, wherein the pass voltage is changed according to the same voltage step as a change of the program voltage.

8. The method of claim 7, wherein the program voltage and the pass voltage are increased as high as a set voltage amount according to an ISPP method.

9. The method of claim 6, further comprising:

when the flash memory device performs a read operation, applying one of set read voltages to the selected word line, and

supplying the pass voltage to the unselected word lines, wherein the pass voltage is set according to the read voltage level applied to the selected word line.

10. The method of claim 9, wherein when the read voltage is set to first to k^th read voltages in order of higher voltages, the pass voltage is set to first to k^th pass voltages in order of higher voltages.