METHOD AND SYSTEM FOR FREQUENCY TUNING BASED ON CHARACTERIZATION OF AN OSCILLATOR

• US 20090243742A1
• Filed: 03/28/2008
• Published: 10/01/2009
• Est. Priority Date: 03/28/2008
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Rofougaran, Ahmadreza
• Granted Patent: US 7,782,145 B2
• Time in Patent Office: Days
• US Class Current: 331/179
• CPC Class Codes: H03B 2201/025 the means being an electronic switch for switching in or out oscillator elements
• CPC Class Codes: H03J 2200/10 Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03L 2207/06 Phase locked loops with a controlled oscillator having at least two frequency control terminals
• CPC Class Codes: H03L 7/08 Details of the phase-locked loop
• CPC Class Codes: H03L 7/085 concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/1806 the frequency divider comprising a phase accumulator generating the frequency divided signal

Abstract

Aspects of a method and system for frequency tuning based on characterization of an oscillator are provided. In this regard, a frequency of an oscillator in an integrated circuit may be controlled based on a first digital control word, a frequency of a tuned circuit may be controlled based on a second digital control word, and the second control word may be determined utilizing a mapping between the first control word and the second control word. The frequency of the oscillator and the tuned circuit may be controlled by adjusting a capacitance of the oscillator and tuned circuit, respectively. The mapping may be based on a relationship between the oscillator and the tuned circuit, such as logical and/or mathematical relationship between the capacitance of the oscillator and the capacitance of the tuned circuit and/or the relationship between the frequency of the oscillator and the frequency of the tuned circuit.

Claims

1. A method for signal processing, the method comprising:

controlling a frequency of an oscillator in an integrated circuit by adjusting a capacitance of said oscillator based on a first digital control word;

determining a second digital control word utilizing a mapping between said first digital control word and said second digital control word, wherein said mapping is based on a relationship between said oscillator and a tuned circuit in said integrated circuit; and

controlling a frequency of said tuned circuit by adjusting a capacitance of said tuned circuit based on said second digital control word.

2. The method according to claim 1, comprising measuring and/or verifying said frequency of said oscillator via a phase locked loop.

3. The method according to claim 1, wherein said mapping is based on a logical and/or mathematical relationship between said capacitance of said oscillator and said capacitance of said tuned circuit.

4. The method according to claim 1, wherein said mapping is based on a logical and/or mathematical relationship between said frequency of said oscillator and said frequency of said tuned circuit.

5. The method according to claim 1, comprising adjusting said capacitance of said oscillator via a configurable bank of capacitors.

6. The method according to claim 1, comprising adjusting said capacitance of said tuned circuit via a configurable bank of capacitors.

7. The method according to claim 1, comprising utilizing one or more look-up tables to implement said mapping between said first digital control word and said second control word.

8. The method according to claim 1, wherein said tuned circuit comprises a filter.

9. The method according to claim 1, wherein said tuned circuit comprises an oscillator.

10. A machine-readable storage having stored thereon, a computer program having at least one code section for signal processing, the at least one code section being executable by a machine for causing the machine to perform steps comprising:

controlling a frequency of an oscillator in an integrated circuit by adjusting a capacitance of said oscillator based on a first digital control word;

determining a second digital control word utilizing a mapping between said first digital control word and said second digital control word, wherein said mapping is based on a relationship between said oscillator and a tuned circuit in said integrated circuit; and

controlling a frequency of said tuned circuit by adjusting a capacitance of said tuned circuit based said second digital control word.

11. The machine-readable storage according to claim 10, wherein said at least one code section comprises code for measuring and/or verifying said frequency of said oscillator via a phase locked loop.

12. The machine-readable storage according to claim 10, wherein said mapping is based on a logical and/or mathematical relationship between said capacitance of said oscillator and said capacitance of said tuned circuit.

13. The machine-readable storage according to claim 10, wherein said mapping is based on a logical and/or mathematical relationship between said frequency of said oscillator and said frequency of said tuned circuit.

14. The machine-readable storage according to claim 10, wherein said at least one code section comprises code for adjusting said capacitance of said oscillator via a configurable bank of capacitors.

15. The machine-readable storage according to claim 10, wherein said at least one code section comprises code for adjusting said capacitance of said tuned circuit via a configurable bank of capacitors.

16. The machine-readable storage according to claim 10, wherein said at least one code section comprises code for utilizing one or more look-up tables to implement said mapping between said first digital control word and said second control word.

17. The machine-readable storage according to claim 10, wherein said tuned circuit comprises a filter.

18. The machine-readable storage according to claim 10, wherein said tuned circuit comprises an oscillator.

19. A system for signal processing, the system comprising:

in an integrated circuit comprising an oscillator and a tuned circuit, one or more circuits that operate to, at least;

control a frequency of said oscillator by adjusting a capacitance of said oscillator based on a first digital control word;

determine a second digital control word utilizing a mapping between said first digital control word and said second digital control word, wherein said mapping is based on a relationship between said oscillator and said tuned circuit; and

control a frequency of said tuned circuit by adjusting a capacitance of said tuned circuit based on said second digital control word.

20. The system according to claim 19, wherein said one or more circuits measure and/or verify said frequency of said oscillator via a phase locked loop.

21. The system according to claim 19, wherein said mapping is based on a logical and/or mathematical relationship between said capacitance of said oscillator and said capacitance of said tuned circuit.

22. The system according to claim 19, wherein said mapping is based on a logical and/or mathematical relationship between said frequency of said oscillator and said frequency of said tuned circuit.

23. The system according to claim 19, wherein said oscillator comprises a configurable bank of capacitors and said capacitance of said oscillator is adjusted via one or more switching elements of said configurable bank of capacitors.

24. The system according to claim 19, wherein said tuned circuit comprises a configurable bank of capacitors and said capacitance of said tuned circuit is adjusted via one or more switching elements of said configurable bank of capacitors.

25. The system according to claim 19, wherein said one or more circuits comprise one or more memory elements enabled to store one or more look-up tables, and said one or more look-up tables are utilized to implement said mapping between said first digital control word and said second control word.

26. The system according to claim 19, wherein said tuned circuit comprises a filter.

27. The system according to claim 19, wherein said tuned circuit comprises an oscillator.