IMAGER, IMAGING CIRCUIT, AND IMAGE PROCESSING CIRCUIT

• US 20090244303A1
• Filed: 02/19/2008
• Published: 10/01/2009
• Est. Priority Date: 05/09/2007
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Kinoshita, Masaya, Kameya, Takashi
• Granted Patent: US 8,023,002 B2
• Time in Patent Office: Days
• US Class Current: 348/218.100
• CPC Class Codes: H04N 23/667 Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/42 by switching between different modes of operation using different resolutions or aspect ratios, e.g. switching between interlaced and non-interlaced mode

Abstract

The number of channels is changed in accordance with an operation mode in an image pickup apparatus. An image-pickup control unit 240 determines the number of operation channels W in accordance with an operation mode. A sensor unit 210 outputs an image pickup signal corresponding to each pixel in accordance with the number of operation channels W. A data sending unit 220 performs serial conversion on image pickup signals, and transfers them to the image processing unit 300 using a high-speed interface (a signal line 229) such as an LVDS in accordance with the number of operation channels W. A data receiving unit 311 performs parallel conversion on the transferred serial signal for each of the channels in units of M bits. A data reconstruction unit 500 detects a synchronization code embedded in the parallel signals, extracts data windows, and supplies, to a signal line 319, image pickup signals of bit length n which are reconstructed from the data windows. A clock gating circuit 330 supplies a clock CLK3 to a signal line 337 only during a period in which a valid flag (a signal line 316) indicates validity.

Claims

1. An image pickup apparatus characterized by comprising:

image pickup means for outputting image pickup signals generated by a plurality of image pickup elements which photoelectrically convert light from a subject;

serial conversion means for converting each of the image pickup signals, each of which is generated from one of the plurality of image pickup elements, into a serial signal;

synchronization-code generation means for generating a synchronization code regarding the image pickup signals before or after the conversion into the serial signal and for embedding the synchronization code into the serial signals;

transfer means for transferring the serial signals using at least one operation channel from among a plurality of channels;

parallel conversion means for performing parallel conversion on each of the transferred serial signals, thereby outputting parallel signals in a number equal to the number of operation channels;

reconstruction means for detecting the embedded synchronization code in the parallel signals, thereby reconstructing the image pickup signals in accordance with the timing of the synchronization code and the number of operation channels; and

control means for performing the setting of the number of operation channels in the transfer means in accordance with an operation mode.

2. An image pickup apparatus comprising image pickup means having a plurality of image pickup elements, each of which generates an image pickup signal of n bits (n is a natural number) by photoelectrically converting light from a subject, image processing means for performing predetermined signal processing on the image pickup signal, transfer means for transferring the image pickup signals using L channels (L is a natural number) at the maximum from the image pickup means to the image processing means, and control means for performing the setting of the number of channels W (w is a natural number) used for the transfer from among the L channels in the transfer means in accordance with an operation mode, the image pickup apparatus characterized in that:

the image pickup means includes serial conversion means for converting each of W image pickup signals, each of which is generated from one of the plurality of image pickup elements, into a serial signal, and synchronization-code generation means for generating an n-bit synchronization code regarding the image pickup signals before or after the conversion into the serial signal and for embedding the n-bit synchronization code into the serial signals,

the transfer means includes means for serially transferring, via the W channels, the serial signals which are converted from the image pickup signals, and

the image processing means includes parallel conversion means for performing parallel conversion on each of the serial signals transferred via the W channels, thereby outputting W parallel signals of M bits (M is a natural number), and reconstruction means for detecting the synchronization code embedded in the parallel signals, thereby reconstructing the image pickup signals of n bits in accordance with the timing of the synchronization code.

3. The image pickup apparatus according to claim 2, characterized by further comprising:

number-of-channel holding means for holding the operation mode in association with the number of channels corresponding to the operation mode,

wherein the control means performs the setting of the number of channels corresponding to the operation mode held in the number-of-channel holding means as the number of channels W used for the transfer.

4. The image pickup apparatus according to claim 2,

characterized in that:

the transfer means performs the serial transfer using differential signals which are opposite to each other.

5. The image pickup apparatus according to claim 4,

characterized in that:

the transfer means performs the serial transfer according to an LVDS transmission scheme.

6. The image pickup apparatus according to claim 2,

characterized in that:

the reconstruction means includes

data-window extraction means for detecting the synchronization code embedded in the parallel signals and for extracting W data windows of N bits (N is a natural number greater than or equal to n) in accordance with the timing of the synchronization code, and

image-pickup-signal extracting means for extracting the W image pickup signals from the data windows in accordance with the bit length n of the image pickup signals.

7. The image pickup apparatus according to claim 6,

characterized in that:

the reconstruction means further includes sorting means for sorting the W image pickup signals in a format necessary for the signal processing.

8. The image pickup apparatus according to claim 6,

characterized in that:

the reconstruction means further includes bit-length adjusting means for adding a random number at a predetermined bit position of each of the W image pickup signals so as to obtain the bit length necessary for the signal processing.

9. The image pickup apparatus according to claim 6,

characterized in that:

the image processing means further includes

a counter for counting clocks periodically in accordance with the timing of the synchronization code,

valid-flag generation means for generating a valid flag indicating the presence or absence of the image pickup signals according to a count value held by the counter, and

clock control means for controlling the occurrence of a clock for the signal processing according to the valid flag.

10. An image pickup circuit in an image pickup apparatus including an image pickup circuit having a plurality of image pickup elements, each of which generates an image pickup signal of n bits (n is a natural number) by photoelectrically converting light from a subject, an image processing circuit for performing predetermined signal processing on the image pickup signals, a transfer circuit for serially transferring the image pickup signals using L channels (L is a natural number) at the maximum from the image pickup circuit to the image processing circuit, and a control circuit for performing the setting of the number of channels W (W is a natural number) used for performing the transfer from among the L channels in the transfer circuit in accordance with an operation mode, the image pickup circuit characterized by comprising:

serial conversion means for converting each of W image pickup signals, each of which is generated from one of the plurality of image pickup elements, into a serial signal, and

synchronization-code generation means for generating an n-bit synchronization code regarding the image pickup signals before or after the conversion into the serial signal and for embedding the n-bit synchronization code into the serial signals.

11. An image processing circuit in an image pickup apparatus including an image pickup circuit having a plurality of image pickup elements, each of which generates an image pickup signal of n bits (n is a natural number) by photoelectrically converting light from a subject, an image processing circuit for performing predetermined signal processing on the image pickup signals, a transfer circuit for serially transferring the image pickup signals using L channels (L is a natural number) at the maximum from the image pickup circuit to the image processing circuit, and a control circuit for performing the setting of the number of channels W (W is a natural number) used for performing the transfer from among the L channels in the transfer circuit in accordance with an operation mode, the image processing circuit characterized by comprising:

parallel conversion means for performing parallel conversion on each of serial signals transferred via the W channels, thereby outputting W parallel signals of M bits (M is a natural number); and

reconstruction means for detecting the synchronization code embedded in the parallel signals and for reconstructing the image pickup signals of n bits in accordance with the timing of the synchronization code.