Correlator And Ultrawideband Radio Receiving Apparatus Incorporating The Same

• US 20090245332A1
• Filed: 03/09/2009
• Published: 10/01/2009
• Est. Priority Date: 03/27/2008
• Status: Abandoned Application

• Current Assignee: Ryuji Kohno, Satoru Ishii, Yasutaka Koike
• Original Assignee: Ryuji Kohno, Satoru Ishii, Yasutaka Koike
• Inventors: Kohno, Ryuji, Ishii, Satoru, Koike, Yasutaka
• Application Number:
  US12/400,592
• Publication Number:
  US 20090245332A1
• Time in Patent Office: Days
• US Class Current: 375/150
• CPC Class Codes: H04B 1/69 Spread spectrum techniques
• CPC Class Codes: H04B 1/7093 Matched filter type
• CPC Class Codes: H04B 1/71637 Receiver aspects H04B1/7183 takes precedence

Abstract

A correlator (i.e., a despreading filter) and an ultrawideband radio receiving apparatus that incorporates the correlator are provided. In one embodiment, a correlator multiplies a plurality of output signals output by a plurality of delay elements that are series-connected by a predetermined coefficient of either +1 or −1 and then sums the plurality of output signals, the delay element including a delay line and an amplifier; the delay line being configured by serially connecting a plurality of delay-line elements, each of the delay-line elements being a low pass filter that has an inductor and a capacitor; the amplifier being connected to an output of a last-stage delay-line element of the series-connected delay-line elements so as to perform impedance matching with respect to the delay line; an output of the amplifier being connected to a subsequent circuit so as to perform impedance matching with respect to the subsequent circuit, such that a loss of the delay line is compensated for and an output voltage of the delay element is made equal to an input voltage of the delay element.

Claims

1. A correlator comprising:

(a) a plurality of delay elements that are connected in series and each output an output signal, the delay element including

a delay line configured by a plurality of delay-line elements that are connected in series, the delay-line element being a low pass filter that has an inductor and a capacitor and

an amplifier that compensates for a loss that occurs in the delay line so that an output voltage of the delay element is equal to an input voltage of the delay element;

the amplifier having

an input connected to an output of the delay-line element constituting a last stage of the delay line so such that impedance matching is obtained between the delay line and the amplifier and

an output connected to an input of a subsequent circuit such that the impedance matching is obtained between the amplifier and the subsequent circuit;

(b) a plurality of multipliers having a predetermined coefficient of either +1 or −

1 and each configured to multiply corresponding each of the output signals supplied from the delay elements by the predetermined coefficient; and

(c) an adder that sums the output signals that have been multiplied by the predetermined coefficient.

2. The correlator as set forth in claim 1, wherein the amplifier of the delay element is a polarity-inverting amplifier that reverses a polarity of the output voltage with respect to a polarity of the input voltage, a sign of the predetermined coefficient is reversed for the output signal that has been output by an odd-numbered delay element of the series-connected delay elements, and the output signal output by the odd-numbered delay element is multiplied by the predetermined coefficient whose sign has been reversed.

3. An ultrawideband radio receiving apparatus that performs despreading of a received spectrum-spread signal by a correlator, the correlator comprising:

(a) a plurality of delay elements that are connected in series and each output an output signal, the delay element including

a delay line configured by a plurality of delay-line elements that are connected in series, the delay-line element being a low pass filter that has an inductor and a capacitor and

an amplifier that compensates for a loss that occurs in the delay line so that an output voltage of the delay element is equal to an input voltage of the delay element;

the amplifier having

an input connected to an output of the delay-line element constituting a last stage of the delay line such that impedance matching is obtained between the delay line and the amplifier and

an output connected to an input of a subsequent circuit such that the impedance matching is obtained between the amplifier and the subsequent circuit,

(b) a plurality of multipliers having a predetermined coefficient of either +1 or −

1 and each configured to multiply corresponding each of the output signals supplied from the delay elements by the predetermined coefficient; and

(c) an adder that sums the output signals that have been multiplied by the predetermined coefficient.