Semiconductor device

• US 20090251275A1
• Filed: 03/20/2009
• Published: 10/08/2009
• Est. Priority Date: 04/03/2008
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Inventors: Tsuda, Hiroshi
• Granted Patent: US 8,228,158 B2
• Time in Patent Office: Days
• US Class Current: 337/290
• CPC Class Codes: H01L 23/5256 comprising fuses, i.e. connections having their state changed from conductive to non-conductive
• CPC Class Codes: H01L 23/5329 Insulating materials
• CPC Class Codes: H01L 23/53295 Stacked insulating layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device 1 has a semiconductor substrate and a first electrical fuse 12 and a second electrical fuse 13, which are provided on the semiconductor substrate. The first electrical fuse 12 has a first upper layer wire 121 and a first lower layer wire 122 formed in different wire layers, and a via 123 for connecting the first upper layer wire 121 to the first lower layer wire 122. The second electrical fuse 13 has a second upper layer wire 131 and a second lower layer wire 132 formed in different wire layers, and a via 133 for connecting the second upper layer wire 131 to the second lower layer wire 132. The semiconductor device 1 has a connection portion 14 for connecting the above described first upper layer wire 121 of the first electrical fuse 12 to the second lower layer wire 132 of the second electrical fuse 13. The connection portion 14 connects the first electrical fuse 12 and the second electrical fuse 13 in series.

Claims

1. A semiconductor device, comprising:

a substrate; and

a first electrical fuse and a second electrical fuse provided on said substrate, wherein

said first electrical fuse has;

a first upper layer wire and a first lower layer wire formed in different wire layers; and

a via for connecting said first upper layer and said first lower layer wire,

said second electrical fuse has;

a second upper layer wire and a second lower layer wire formed in different wire layers; and

a via for connecting said second upper layer and said second lower layer wire,

the semiconductor device comprises a connection portion for connecting said first upper layer wire of said first electrical fuse to said second lower layer wire of said second electrical fuse, and

said first electrical fuse and said second electrical fuse are connected in series via said connection portion.

2. The semiconductor device according to claim 1, wherein said connection portion is a via for connecting said first upper layer wire of said first electrical fuse to said second lower layer wire of said second electrical fuse.

3. The semiconductor device according to claim 1, wherein

said first lower layer wire of said first electrical fuse and said second lower layer wire of said second electrical fuse are provided in the same wire layer, and

said first upper layer wire of said first electrical fuse and said second upper layer wire of said second electrical fuse are provided in the same wire layer.

4. The semiconductor device according to claim 2, wherein a plurality of vias as said connection portion, are provided.

5. The semiconductor device according to claim 2, wherein the vias of said first electrical fuse and said second electrical fuse have the same diameter.

6. The semiconductor device according to claim 5, wherein the diameter of the via, which is said connection portion, is greater than the diameter of the vias of said first electrical fuse and said second electrical fuse.

7. The semiconductor device according to claim 1, wherein said first upper layer wire of said first electrical fuse, said second lower layer wire of said second electrical fuse and said connection portion are provided in the same wire layer.

8. The semiconductor device according to claim 1, wherein

a flow-out portion which flows out is formed in one of said first upper layer wire and said first lower layer wire, and a space is created between the other of said first upper layer wire and said first lower layer wire and the via, or in said via, when said first electrical fuse is cut, and

a flow-out portion which flows out is formed in one of said second upper layer wire and said second lower layer wire, and a space is created between the other of said second upper layer wire and said second lower layer wire and the via, or in said via, when said second electrical fuse is cut.

9. The semiconductor device according to claim 8, wherein

the via of said first electrical fuse connects an end portion of said first upper layer wire to an end portion of said first lower layer wire, and

the via of said second electrical fuse connects an end portion of said second upper layer wire to an end portion of said second lower layer wire.