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Semiconductor Device

  • US 20090251941A1
  • Filed: 04/01/2009
  • Published: 10/08/2009
  • Est. Priority Date: 04/03/2008
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising:

  • a first control circuit;

    a second control circuit;

    a transistor, the transistor being a p-type, a gate of the transistor being electrically connected to the first control circuit through a first word line, and one of a source and a drain of the transistor being electrically connected to the second control circuit through a bit line, anda memory element, a first terminal of the memory element being electrically connected to the other of the source and the drain of the transistor, and a second terminal of the memory element being electrically connected to the first control circuit through a second word line,wherein;

    the first control circuit is configured to supply a first potential to the gate of the transistor through the first word line,the second control circuit is configured to supply a second potential to the one of the source and the drain of the transistor through the bit line,the first control circuit is configured to supply a third potential to the second terminal of the memory element through the second word line,the third potential at a time of data writing is negative potential, anda potential difference between the second potential and the third potential at the time of data wiring is larger than a withstand voltage of the transistor.

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