SEMICONDUCTOR MEMORY HAVING VOLATILE AND MULTI-BIT, NON-VOLATILE FUNCTIONALITY AND METHODS OF OPERATING
First Claim
1. A semiconductor memory cell comprising:
- a substrate having a first conductivity type;
a first region embedded in the substrate at a first location of the substrate and having a second conductivity type;
a second region embedded in the substrate at a second location of the substrate and have the second conductivity type, such that at least a portion of the substrate having the first conductivity type is located between the first and second locations and functions as a floating body to store data in volatile memory;
a trapping layer positioned in between the first and second locations and above a surface of the substrate;
the trapping layer comprising first and second storage locations being configured to store data as nonvolatile memory independently of one another; and
a control gate positioned above the trapping layer.
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Accused Products
Abstract
A semiconductor memory cell, semiconductor memory devices comprising a plurality of the semiconductor memory cells, and methods of using the semiconductor memory cell and devices are described. A semiconductor memory cell includes a substrate having a first conductivity type; a first region embedded in the substrate at a first location of the substrate and having a second conductivity type; a second region embedded in the substrate at a second location of the substrate and have the second conductivity type, such that at least a portion of the substrate having the first conductivity type is located between the first and second locations and functions as a floating body to store data in volatile memory; a trapping layer positioned in between the first and second locations and above a surface of the substrate; the trapping layer comprising first and second storage locations being configured to store data as nonvolatile memory independently of one another; and a control gate positioned above the trapping layer.
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Citations
21 Claims
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1. A semiconductor memory cell comprising:
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a substrate having a first conductivity type; a first region embedded in the substrate at a first location of the substrate and having a second conductivity type; a second region embedded in the substrate at a second location of the substrate and have the second conductivity type, such that at least a portion of the substrate having the first conductivity type is located between the first and second locations and functions as a floating body to store data in volatile memory; a trapping layer positioned in between the first and second locations and above a surface of the substrate;
the trapping layer comprising first and second storage locations being configured to store data as nonvolatile memory independently of one another; anda control gate positioned above the trapping layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13)
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12. A method of operating a memory cell device having a plurality of memory cells each having a floating body for storing, reading and writing data as volatile memory, and a trapping layer having first and second storage locations for storing data as non-volatile memory, the method comprising:
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writing data to the floating body of a memory cell of said device; writing additional data to the floating body of another memory cell of said device, while at the same time commencing writing data from the floating body of the previous memory cell to non-volatile storage of that cell; and continuing to write additional data to the floating bodies of more memory cells of said device, as volatile memory, while at the same time, writing volatile memory from cells in which data has already been written to the floating bodies thereof, to non-volatile memory in a mass parallel, non-algorithmic process.
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14. A method of operating a memory cell having a floating body for storing, reading and writing data as volatile memory, and a trapping layer comprising two storage locations for storing data as non-volatile memory, the method comprising:
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storing permanent data in one of said two storage locations in the trapping layer; storing additional data to the floating body while power is applied to the memory cell; transferring the additional data stored in the floating body to the other of said two storage locations of the trapping layer when power to the cell is interrupted; and storing the additional data in the other of said two storage locations of the trapping layer as non-volatile memory. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21)
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Specification